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公开(公告)号:EP4395169A1
公开(公告)日:2024-07-03
申请号:EP23834530.0
申请日:2023-05-23
发明人: AN, Shuoming , DAI, Maochun , HU, Jingjing , ZHANG, Wenlong , LI, Dengfeng , ZHANG, Shengyu
IPC分类号: H03F19/00
CPC分类号: G06F30/367 , H03F19/00
摘要: Provided in the present application are a determination method and apparatus for a superconducting impedance transformation parametric amplifier, a superconducting impedance transformation parametric amplifier, an electronic device, a computer program product and a computer-readable storage medium. The method comprises: based on a wavelength parameter, a gain parameter and a bandwidth parameter, calculating an impedance value of an impedance transformation line of a superconducting impedance transformation parametric amplifier and a capacitance value of the amplifier; based on the impedance value of the impedance transformation line, calculating a linewidth dimension of a coplanar waveguide of the superconducting impedance transformation parametric amplifier; based on the impedance value of the impedance transformation line and the capacitance value of the amplifier, calculating a stub dimension of the superconducting impedance transformation parametric amplifier; and based on the linewidth dimension and the stub dimension, determining structural parameters of the superconducting impedance transformation parametric amplifier.
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公开(公告)号:EP4395168A1
公开(公告)日:2024-07-03
申请号:EP23866669.7
申请日:2023-06-13
发明人: HU, Jingjing , DAI, Maochun , AN, Shuoming , ZHANG, Wenlong , LI, Dengfeng , ZHANG, Shengyu
摘要: A chip preparation method and system, and a chip are provided, relating to the field of micro/nanofabrication technologies. The method includes the following steps: preparing, by using a laser direct writing exposure manner, a first underlying circuit of an impedance Josephson parametric amplifier and a second underlying circuit for testing, to obtain a first chip product (201); generating, on the first chip product by using the laser direct writing exposure manner, a photoresist structure for preparing a Josephson junction (202); cutting, from the first chip product, a second chip product on which the second underlying circuit is located and a third chip product on which the first underlying circuit is located (203); trail producing a Josephson junction sample based on a photoresist structure corresponding to the second underlying circuit, to obtain an oxidation condition (204); preparing, according to the oxidation condition, the Josephson junction based on a photoresist structure corresponding to the first underlying circuit, to obtain a fourth chip product (205); and obtaining a target chip product based on the fourth chip product (206).
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公开(公告)号:EP4064137A1
公开(公告)日:2022-09-28
申请号:EP21844599.7
申请日:2021-09-08
发明人: ZHOU, Yu , ZHANG, Zhenxing , AN, Shuoming , YIN, Zelong , HUAI, Sainan , GU, Xiu , XU, Xiong , ZHANG, Shengyu
IPC分类号: G06N10/00
摘要: The present disclosure discloses a quantum circuit and a quantum processor, relating to the field of quantum technologies. The quantum circuit includes: a qubit, a resonant cavity, and a feeder, the resonant cavity being coupled to the qubit, and the feeder being coupled to the qubit. The feeder is configured to feed an initialization signal to the qubit, the initialization signal being a modulation signal used for causing a frequency of the qubit to generate an oscillation. The oscillation causes an equivalent state exchange to occur between the qubit and the resonant cavity, and an excited state of the qubit is initialized to a ground state by using the resonant cavity. The present disclosure provides an efficient and high-precision qubit initialization solution. A modulation signal is applied to a qubit as an initialization signal, so that an excited state of the qubit quickly decays to a ground state by using a resonant cavity, thereby implementing rapid and high-fidelity initialization. In addition, a feedback loop does not need to be introduced to measure and read a state of the qubit, thereby reducing requirements for hardware.
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