Method of efficiently and simultaneously transmitting both isochronous and nonisochronous data in a computer network
    1.
    发明公开
    Method of efficiently and simultaneously transmitting both isochronous and nonisochronous data in a computer network 失效
    在计算机网络中有效和同时传输两个异步数据和非重要数据的方法

    公开(公告)号:EP0153838A3

    公开(公告)日:1988-01-13

    申请号:EP85301052

    申请日:1985-02-18

    IPC分类号: H04L11/16

    CPC分类号: H04L12/433 H04L12/64

    摘要: A method of transmitting isochronous and nonisochronous data through a computer network in which a plurality of stations have respective input and output ports that are serially coupled together to form a loop includes the steps of: transmitting data characters of a nonisochronous frame from a first station in the loop; passing the data characters from the first station through a second station in the loop but with a pair. of control characters inserted between any two data characters indicating the beginning and end of an isochronous frame within the nonisochronous frame; passing the data characters and control characters from the second station through a third station on the loop but with another internally generated isochronous data character inserted between the control characters; temporarily stopping the transmitting step in the first station in response to the receipt of at least one of the control characters to pass the isochronous frame through the first station; and proceeding in the first station with the transmitting of the nonisochronous frame after passing the isochronous frame.

    Method of operating a data processing system via depictor-linked microcode and logic circuitry
    5.
    发明公开
    Method of operating a data processing system via depictor-linked microcode and logic circuitry 失效
    通过连接的微处理器和逻辑电路操作数据处理系统的方法

    公开(公告)号:EP0138352A3

    公开(公告)日:1988-03-16

    申请号:EP84305968

    申请日:1984-08-31

    IPC分类号: G06F09/42 G06F09/26

    CPC分类号: G06F9/4486

    摘要: © A method of operating a data processing system includes the steps of: executing one high level language software program until an instruction is encountered which calls and activity; sensing whether said encountered instruction is linked to the activity which it calls by a first type or a second type depictor; executing another high level language software program for performing the called activity if the sensing step detects the first type depictor; and activating a low level language microcode program or hardware logic circuit for performing the called activity if the sensing step detects the second type depictor.

    Method of synchronizing the sequence by which a variety of randomly called unrelated activities are executed in a digital processor
    6.
    发明公开
    Method of synchronizing the sequence by which a variety of randomly called unrelated activities are executed in a digital processor 失效
    通过数字处理器执行的随机调用的相关活动的各种同步序列的方法

    公开(公告)号:EP0132381A3

    公开(公告)日:1987-11-11

    申请号:EP84304922

    申请日:1984-07-19

    IPC分类号: G06F09/46

    CPC分类号: G06F9/4881

    摘要: @ A method of synchronizing the sequence by which a variety of unrelated activities are executed in a digital processor when the activities are randomly called by multiple callers includes the steps of: providing a single processor queue for holding respective pointers to each different kind of activity that the processor performs; entering the pointer of an activity in the processor queue the first time that the activity is called; providing respective activity queues for each different kind of activity that the processor performs; entering a pointer to the caller of an activity in the respective queue for the called activity each time the activity is called subsequent to its first call; repeatedly executing a single activity pointed to by one pointer in the processor queue until that activity is executed once for each of its callers, provided that if the single activity calls another activity then, executing the single activity only up to the point where the call occurs; and proceeding in the same fashion with the execution of another activity pointed to by the processor queue.

    Method of efficiently and simultaneously transmitting both isochronous and nonisochronous data in a computer network
    7.
    发明公开
    Method of efficiently and simultaneously transmitting both isochronous and nonisochronous data in a computer network 失效
    一种用于在计算机网络中的同步和nonisochronous数据的高效和同时传输方法。

    公开(公告)号:EP0153838A2

    公开(公告)日:1985-09-04

    申请号:EP85301052.8

    申请日:1985-02-18

    IPC分类号: H04L12/28

    CPC分类号: H04L12/433 H04L12/64

    摘要: A method of transmitting isochronous and nonisochronous data through a computer network in which a plurality of stations have respective input and output ports that are serially coupled together to form a loop includes the steps of: transmitting data characters of a nonisochronous frame from a first station in the loop; passing the data characters from the first station through a second station in the loop but with a pair. of control characters inserted between any two data characters indicating the beginning and end of an isochronous frame within the nonisochronous frame; passing the data characters and control characters from the second station through a third station on the loop but with another internally generated isochronous data character inserted between the control characters; temporarily stopping the transmitting step in the first station in response to the receipt of at least one of the control characters to pass the isochronous frame through the first station; and proceeding in the first station with the transmitting of the nonisochronous frame after passing the isochronous frame.

    Method of operating a data processing system via depictor-linked microcode and logic circuitry
    8.
    发明公开
    Method of operating a data processing system via depictor-linked microcode and logic circuitry 失效
    经由“depictor”相关联的微指令和逻辑电路操作数据处理系统的方法。

    公开(公告)号:EP0138352A2

    公开(公告)日:1985-04-24

    申请号:EP84305968.4

    申请日:1984-08-31

    IPC分类号: G06F9/42 G06F9/26

    CPC分类号: G06F9/4486

    摘要: © A method of operating a data processing system includes the steps of: executing one high level language software program until an instruction is encountered which calls and activity; sensing whether said encountered instruction is linked to the activity which it calls by a first type or a second type depictor; executing another high level language software program for performing the called activity if the sensing step detects the first type depictor; and activating a low level language microcode program or hardware logic circuit for performing the called activity if the sensing step detects the second type depictor.

    Method of operating a data processing system via depictor-linked microcode and logic circuitry
    9.
    发明授权
    Method of operating a data processing system via depictor-linked microcode and logic circuitry 失效
    通过连接的微处理器和逻辑电路操作数据处理系统的方法

    公开(公告)号:EP0138352B1

    公开(公告)日:1991-06-19

    申请号:EP84305968.4

    申请日:1984-08-31

    IPC分类号: G06F9/42 G06F9/26

    CPC分类号: G06F9/4486

    摘要: A method of operating a data processing system includes the steps of: executing one high level language software program until an instruction is encountered which calls an activity; sensing whether said encountered instruction is linked to the activity which it calls by a first type or a second type depictor; executing another high level language software program for performing the called activity if the sensing step detects the first type depictor; and activating a low level language microcode program or hardware logic circuit for performing the called activity if the sensing step detects the second type depictor.

    Method of performing a sequence of related activities in multiple independent digital processors
    10.
    发明公开
    Method of performing a sequence of related activities in multiple independent digital processors 失效
    在多个独立数字处理器中执行相关活动的顺序的方法

    公开(公告)号:EP0132158A3

    公开(公告)日:1987-11-04

    申请号:EP84304923

    申请日:1984-07-19

    IPC分类号: G06F09/46

    CPC分类号: G06F9/547

    摘要: A method of performing a sequence of related activities in multiple digital processors includes the steps of: executing a portion of a first activity of the sequence in a first processor and then executing an INTERPROCESSOR CALL instruction to a second activity in a second processor; suspending execution of the first activity in response to the CALL and signaling the second processorthatthe second activity has been called by the first activity; completely executed the second activity in the second processor and then executing an INTERPROCESSOR NEXT instruction to a third activity in a third processor; signaling the third processor in response to the NEXT instruction that the third activity has been called not by the second activity but by the caller of the second activity; and completely executing the third activity in the third processer and, upon completion thereof, signaling the third activity's caller to resume execution of the suspended activity.