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    DATA STORAGE METHOD AND NETWORK INTERFACE CARD
    1.
    发明授权
    DATA STORAGE METHOD AND NETWORK INTERFACE CARD 有权

    公开(公告)号：EP3159803B1

    公开(公告)日：2018-11-28

    申请号：EP15810575.9

    申请日：2015-04-20

    Applicant: Huawei Technologies Co. Ltd.

    Inventor： QIAN, Feili

    IPC: G06F13/12 ,  H04L29/08 ,  G06F13/28

    CPC classification number: H04L67/1097 ,  G06F13/128 ,  G06F13/28 ,  H04L29/06 ,  H04L69/16

    Abstract: The present invention discloses a data storage method and a network interface card. In this solution, buffered unsolicited data is written, in a DMA manner, into storage space that corresponds to a destination address corresponding to the unsolicited data, and a rate of writing data in a DMA manner is higher than a rate of writing data in a copying manner; therefore, time required in a data storage process is shortened and a storage rate is improved. In addition, because a write operation is performed by hardware of the network interface card, consumption of CPU resources is reduced, which further reduces impact on processing rates of other application programs.

    DATA TRANSFER MANAGEMENT METHOD, SOFTWARE AND SYSTEM
    6.
    发明公开
    DATA TRANSFER MANAGEMENT METHOD, SOFTWARE AND SYSTEM 有权
    数据传输行政程序，软件和系统

    公开(公告)号：EP1668525A4

    公开(公告)日：2007-01-03

    申请号：EP04775146

    申请日：2004-09-16

    Applicant: ENDACE TECHNOLOGY LTD

    Inventor： PELLET SELWYN LYALL

    IPC: G06F13/38 ,  G06F13/12 ,  H04L12/24

    CPC classification number: G06F13/385 ,  G06F13/128

    Abstract: The present is that the provided method of managing data transfers between a base component and at least one extension component on a computer system. The extension component can store data received within an extension component data store and then subsequently transfer this data to a processor integrated within the base component using a communications channel. The processor can then process the data transferred and subsequently transfer references to the data stored in the extension component data store using the communications channel. Preferably the base component also includes a processor data store used to provide an equivalent copy of data held within the extension component data store.

    A PERIPHERAL INTERFACE CIRCUIT FOR AN I/O NODE OF A COMPUTER SYSTEM
    8.
    发明授权
    A PERIPHERAL INTERFACE CIRCUIT FOR AN I/O NODE OF A COMPUTER SYSTEM 有权
    外设接口电路对E /计算机系统的一个结

    公开(公告)号：EP1436709B1

    公开(公告)日：2006-04-26

    申请号：EP02801621.0

    申请日：2002-08-22

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： ASKAR, Tahsin ,  HEWITT, Larry, D. ,  CHAMBERS, Eric, G.

    IPC: G06F13/12

    CPC classification number: G06F13/128

    Abstract: A peripheral interface circuit (350) for an I/O node of a computer system. A peripheral interface circuit for an input/output node of a computer system includes a first buffer circuit (390), a second buffer circuit (5300) and a bus interface circuit (490). The first buffer circuit receives packet commands and may include a first plurality of buffers each corresponding to a respective virtual channel of a plurality of virtual channels. The second buffer circuit is coupled to receive packet commands from the bus interface circuit and may include a second plurality of buffers each corresponding to a respective virtual channel of the plurality of virtual channels. The bus interface circuit may be configured to translate selected packet commands stored in the first buffer circuit into commands suitable for transmission on a peripheral bus (560).

    INTELLIGENT NETWORK STORAGE INTERFACE SYSTEM AND DEVICES
    10.
    发明公开
    INTELLIGENT NETWORK STORAGE INTERFACE SYSTEM AND DEVICES 有权
    智能网络存储接口系统和这样的设备

    公开(公告)号：EP1330725A1

    公开(公告)日：2003-07-30

    申请号：EP01977193.0

    申请日：2001-09-24

    Applicant: Alacritech, Inc.

    Inventor： STARR, Daryl, D. ,  PHILBRICK, Clive, M. ,  BOUCHER, Laurence, B.

    IPC: G06F15/173

    CPC classification number: G06F13/128 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/067 ,  H04Q3/0029 ,  H04Q2213/13093 ,  H04Q2213/13103 ,  H04Q2213/13204 ,  H04Q2213/13299 ,  H04Q2213/1332 ,  H04Q2213/13345

    Abstract: An interface device (22) is connected to a host computer (20) by an I/O bus (40) and provides hardware and processing mechanisms for accelerating data transfers between a network (25, 28) and a storage unit (66, 70), while controlling the data transfers by the host (20). The interface device includes hardware circuitry (52, 58, 60) for processing network packet headers, and can use a dedicated fast-path for data transfer between the network (25, 28) and the storage unit (66, 70), the fast-path set up by the host(20). The host CPU (30) and protocol stack (38) avoids protocol processing for data transfer over the fast-path, freeing host bus bandwidth, and the data need not cross the I/Obus (40), freeing I/O bus bandwidth. The storage unit (66, 70) may include RAID or other multiple drive configurations and may be connected to the interface device (22) by a parallel channel such as SCSI or by a serial channel such as Ethernet of Fibre Channel. The interface device (22) contains a file cache (80) that stores data transferred between the network and the storage unit, with organization of data in the interface device file cache (80) controlled by a file system (23) on the host. Additional interface devices (303, 310, 420, 490) may be connected to the host (20) via the I/O bus (40), with each additional interface device (303, 310, 420, 490) having a file cache controlled by the host file system (23), and providing additional network connections (305, 313, 414, 416, 418, 420, 492, 494) and/or being connected to additional storage units (308, 315). Realtime audio and video communication can also be provided when the interface device is coupled by an audio/video interface (666,677) to appropriate communication devices, such as microphone (670, 680), a speaker (668, 678), a camera (674, 684) and/or a display (672, 682).

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