SHIFT REGISTER UNIT, OPERATION METHOD THEREFOR AND SHIFT REGISTER

    公开(公告)号:EP3361479A1

    公开(公告)日:2018-08-15

    申请号:EP16853096.2

    申请日:2016-09-30

    Abstract: Disclosed are a shift register unit, an operation method therefor and a shift register comprising the shift register unit. The shift register unit comprises: an input module configured to transmit a received input signal to a pull-up node; an output module configured to output a first control signal of a first control signal end to an output end when a pull-up signal at the pull-up node is at an effective pull-up level; and a coupling module, wherein the first end thereof is connected to a second control signal end, the second end thereof is connected to the pull-up node, and the coupling module is configured to control the pull-up signal at the pull-up node in a voltage coupling manner according to a second control signal of the second control signal end. By further pulling up the voltage at the pull-up node when an output end is reset, the speed of resetting the output end can be increased.

    DATA ACQUISITION MODULE AND METHOD, DATA PROCESSING UNIT, DRIVER AND DISPLAY DEVICE
    5.
    发明公开
    DATA ACQUISITION MODULE AND METHOD, DATA PROCESSING UNIT, DRIVER AND DISPLAY DEVICE 审中-公开
    数据采集​​模块和方法,数据处理单元,驱动器和显示设备

    公开(公告)号:EP3242284A1

    公开(公告)日:2017-11-08

    申请号:EP15839056.7

    申请日:2015-05-19

    Abstract: The present invention provides a data acquiring module, comprising: a data input and output terminal, through which date enter into the data acquiring module, and which can output data independently; a shift register groups, each of which comprises ( b-1 ) serially connected shift registers, and an output terminal of each shift register being able to output data independently, wherein a and b are integers greater than 1; and ( a-1 ) serially connected first-in first-out memories connected to ( a-1 ) shift register groups respectively, and the output terminal of each first-in first-out memory being able to output data independently, an input terminal of the last shift register in the shift register group without a corresponding first-in first-out memory in the a shift register groups, and the input terminal of the last first-in first-out memory of the serially connected first-in first-out memories being connected to the data input and output terminal. The present invention also provides a data processing unit, a driver and a display device.

    Abstract translation: 本发明提供了一种数据采集模块,包括:数据输入输出端,数据输入输出端通过该数据输入到数据采集模块,并可以独立输出数据; 一个移位寄存器组,每个移位寄存器组包括(b-1)个串联连接的移位寄存器,并且每个移位寄存器的输出端能够独立地输出数据,其中a和b是大于1的整数; 和(a-1)分别连接到(a-1)个移位寄存器组的串联连接的先入先出存储器,并且每个先进先出存储器的输出端能够独立地输出数据,输入端 所述移位寄存器组中的所述移位寄存器组中的最后一个移位寄存器中没有对应的先入先出存储器的输入端和所述串行连接的先入先出存储器中的最后一个先入先出存储器的输入端, 输出存储器连接到数据输入和输出端。 本发明还提供了一种数据处理单元,驱动器和显示装置。

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