Abstract:
The present disclosure provides a shift register circuit, an array substrate, and a display device. The shift register circuit comprises two or more driving modules arranged on an array substrate for block driving in a direction substantially perpendicular to a gate line. For a first driving module and a second driving module adjacent to each other in a direction substantially perpendicular to the gate line, a first driving input wiring of the first driving module is arranged to input a first clock driving signal to individual shift registers successively from a shift register at a first end position of the first driving module to a shift register at a second end position of the first driving module, and a second driving input wiring of the second driving module is arranged to input a second clock driving signal to individual shift registers successively from a shift register at a second end position of the second driving module to a shift register at a first end position of the second driving module.
Abstract:
Disclosed are a shift register unit, an operation method therefor and a shift register comprising the shift register unit. The shift register unit comprises: an input module configured to transmit a received input signal to a pull-up node; an output module configured to output a first control signal of a first control signal end to an output end when a pull-up signal at the pull-up node is at an effective pull-up level; and a coupling module, wherein the first end thereof is connected to a second control signal end, the second end thereof is connected to the pull-up node, and the coupling module is configured to control the pull-up signal at the pull-up node in a voltage coupling manner according to a second control signal of the second control signal end. By further pulling up the voltage at the pull-up node when an output end is reset, the speed of resetting the output end can be increased.
Abstract:
Provided are a display panel including a scan driver and a method of operating the same. The display panel includes a shift register including a plurality of stages that shifts and outputs a clock signal. A display area in the display panel is divided into a plurality of driving areas. The stages of the shift register corresponding to each driving area form a stage group. In each stage group, the stages included in the stage group sequentially output a scan signal by using an independent start signal.
Abstract:
The present disclosure provides a shift register unit. The shift register unit includes a pre-charge reset module; a pull-up module; a pull-down module; a first pull-down control module; and a second pull-down control module. The pre-charge reset module is connected to a forward scanning control signal input terminal, a reverse scanning control signal input terminal, a first signal input terminal, a second signal input terminal, and a pull-up control node. The pull-up module is connected to the pull-up control node, an input terminal of a first clock signal, and a signal output terminal. The first pull-down control module is connected to a pull-down control node, the forward scanning control signal input terminal, the reverse scanning control signal input terminal, the first signal input terminal, and the second signal input terminal.
Abstract:
The present invention provides a data acquiring module, comprising: a data input and output terminal, through which date enter into the data acquiring module, and which can output data independently; a shift register groups, each of which comprises ( b-1 ) serially connected shift registers, and an output terminal of each shift register being able to output data independently, wherein a and b are integers greater than 1; and ( a-1 ) serially connected first-in first-out memories connected to ( a-1 ) shift register groups respectively, and the output terminal of each first-in first-out memory being able to output data independently, an input terminal of the last shift register in the shift register group without a corresponding first-in first-out memory in the a shift register groups, and the input terminal of the last first-in first-out memory of the serially connected first-in first-out memories being connected to the data input and output terminal. The present invention also provides a data processing unit, a driver and a display device.
Abstract:
Provided are a display panel including a scan driver and a method of operating the same. The display panel includes a shift register including a plurality of stages that shifts and outputs a clock signal. A display area in the display panel is divided into a plurality of driving areas. The stages of the shift register corresponding to each driving area form a stage group. In each stage group, the stages included in the stage group sequentially output a scan signal by using an independent start signal.
Abstract:
Embodiments of the present disclosure provide a shift register unit and a driving method thereof, a gate driving circuit and a display device. The shift register unit comprises a latch module and a latch output module. Switching on and off of the transmission gates is controlled by using an intermediate signal generated based on a clock signal and an inputted signal, instead of by using the clock signal, such that the shift register unit will not be influenced by frequent flips of the clock signal in a non-operational state, thus avoiding a great deal of useless power consumption.
Abstract:
Provided are a gate driving circuit and a display device using the same. The gate driving circuit includes: a plurality of stages, each stage sequentially receiving a phase-delayed clock and sequentially generating an output. A kth stage (200) (k is a positive integer) includes: a first inverter (INV1) including a first PMOS transistor (M2) and a first NMOS transistor (M1); a second inverter (INV2) including a second PMOS transistor (M4) and a second NMOS transistor (M3); and a reset signal line (RST_SL) connected to a source terminal of the second NMOS transistor (M3) and supplying a reset signal (RST) to initiate the nth stage (STn).
Abstract:
A display device including: a display panel including a gate line and a data line; and a shift register including a stage for driving the gate line. The stage may include a first driving unit in a display area of the display panel and a second driving unit in a non-display area of the display panel.
Abstract:
The present disclosure relates to the technical field of display. Provided are a shift register unit, a gate driving circuit and a display apparatus, the shift register unit comprises an inputting module, a first outputting module and a second outputting module. As compared with the prior art, the structure of the shift register unit can be simplified effectively, and the number of use of the transistors can be further reduced. Embodiments of the present disclosure are used to implement scanning and driving.