公开(公告)号：EP4418511A1

公开(公告)日：2024-08-21

申请号：EP23179269.8

申请日：2023-06-14

Applicant: Delta Electronics Inc.

Inventor： TUNG, Feng-Hsuan ,  TSAI, Terng-Wei ,  HUANG, Chia-Hsiong ,  LIN, Yu-Jen

IPC: H02M1/00 ,  H02M1/42 ,  H02M3/00 ,  H02M3/07 ,  H02M7/48 ,  H02M7/483 ,  H02M1/15 ,  H02M1/44

CPC classification number: H02M3/01 ,  H02M3/07 ,  H02M1/0064 ,  H02M1/0058 ,  H02M1/0095 ,  H02M7/4837 ,  H02M7/4815 ,  H02M1/4241 ,  H02M1/4216 ,  H02M1/327 ,  H02M1/44 ,  H02M1/15 ,  H02M3/158

Abstract: A flying capacitor (FC, FC1, FC2, FC3, FC-1, FC-2) converter with zero-zero switching includes an input inductor (Lboost, Lboost-1, Lboost-2), a fast-switching switch leg (11), a slow-switching switch leg (12), at least one flying capacitor (FC, FC1, FC2, FC3, FC-1, FC-2), a resonant tank (13), and an output capacitor (Co). The fast-switching switch leg (11) included an upper leg (111) having a plurality of upper switches (Q11, Q12, Q13, Q14) and a lower leg (112) having a plurality of lower switches (Q21, Q22, Q23, Q24). The slow-switching switch leg (12) includes a slow-switching upper switch (Q1) and a slow-switching lower switch (Q2), and the slow-switching upper switch (Q1) and the slow-switching lower switch (Q2) are coupled at a second middle node (N2). The at least one flying capacitor (FC, FC1, FC2, FC3, FC-1, FC-2) is correspondingly coupled between the upper node (N11, N12, N13) and the lower node (N21, N22, N23). The resonant tank (13) includes a resonant inductor (Lr) and a resonant capacitor (Cr), and the resonant inductor (Lr) and the resonant capacitor (Cr) are coupled in series between the first middle node (N1) and the second middle node (N2).

公开(公告)号：EP3793077B1

公开(公告)日：2024-07-17

申请号：EP19197041.7

申请日：2019-09-12

IPC: H02M7/483 ,  H02M1/42 ,  H02J9/06 ,  H02M7/487

CPC classification number: H02M1/4233 ,  H02M7/487 ,  H02J9/062 ,  H02M1/4216 ,  H02M1/0043 ,  H02M7/4833

公开(公告)号：EP3874588B1

公开(公告)日：2024-06-05

申请号：EP19795022.3

申请日：2019-10-31

IPC: H02M1/42

CPC classification number: H02M1/4208 ,  H02M1/4216 ,  H02M1/4225 ,  H02M1/4283 ,  H02M1/0085

公开(公告)号：EP4325705A3

公开(公告)日：2024-05-15

申请号：EP24150636.9

申请日：2019-06-14

Applicant: Infineon Technologies Austria AG

Inventor： BORTIS, Dominik ,  KOLAR, Johann ,  AZURZA ANDERSON, Jon

IPC: H02M1/42 ,  H02M7/487 ,  H02M7/217 ,  H02M1/12 ,  H02M1/00

CPC classification number: H02M1/4216 ,  H02M1/12 ,  H02M7/487 ,  H02M7/217 ,  Y02B70/10 ,  H02M1/0048 ,  H02M1/0054 ,  H02M1/0077 ,  H02M1/007

Abstract: A method for operating a power converter is enclosed. The method includes operating the power converter (10) in a reduced switching mode. The power converter includes three input nodes (A, B, C) each configured to receive a respective one of three input voltages (V1, V2, V2) two DC link nodes (X, Z) configured to provide a DC link voltage (V4), and a midpoint (Y) coupled to each of the two DC link nodes (X, Z); three inductors (L1, L2, L3) each connected to a respective one of the three input nodes (A, B, C); and a rectifier bridge (1) comprising three bridge legs (11, 12, 13) each coupled to a respective one of the three inputs (A, B, C) through a respective one of the three inductors (L1, L2, L3) and connected to the respective one of the three inductors (L1, L2, L3) at a respective switch node (A', B', C'), wherein each of the three bridge legs (11, 12, 13) is connected to the two DC link nodes (X, Z) and the midpoint (Y), and comprises at least one electronic switch (Q1, Q2, Q3). Operating the power converter in the reduced switching mode includes deactivating at least one of the three bridge legs (11, 12, 13) for a predefined time period.

公开(公告)号：EP3826159B1

公开(公告)日：2024-05-08

申请号：EP20185405.6

申请日：2020-07-13

IPC: H02M1/42 ,  H02M7/487

CPC classification number: H02M1/4216 ,  H02M7/487 ,  Y02P80/10

公开(公告)号：EP3371880A1

公开(公告)日：2018-09-12

申请号：EP16797972.3

申请日：2016-10-31

Applicant: GE Energy Power Conversion Technology Limited

Inventor： WAGONER, Robert Gregory ,  LUO, Cheng ,  PANT, Siddharth

IPC: H02M7/487 ,  H02M7/5387 ,  H02M7/5395

CPC classification number: H02M7/537 ,  H02M1/42 ,  H02M1/4216 ,  H02M7/487 ,  H02M7/5395 ,  H02M2001/327 ,  Y02B70/126

Abstract: Provided is a method for controlling operation of semiconductor gates in a power conversion system including one or more multilevel inverters coupleable to a modulator and a controller. The method includes generating, via the controller, a control signal responsive to an output current power factor associated with the inverters and producing a discontinuous pulse width modulation reference signal based upon the control signal and a target output power, the discontinuous pulse width modulation reference signal being indicative of shifting a phase angle between current and voltage. A gating signal is generated for output from the modulator, as a function of the reference signal and a carrier waveform. The gating signal adjusts the phase angle to prevent switching of the semiconductor gates.

公开(公告)号：EP3175528B1

公开(公告)日：2018-08-15

申请号：EP15733815.3

申请日：2015-06-10

Applicant: Renault s.a.s

Inventor： KVIESKA, Pedro ,  MERIENNE, Ludovic

IPC: H02J3/01 ,  B60L11/18 ,  H02M1/12 ,  H02J7/02

CPC classification number: H02J3/01 ,  B60L11/1812 ,  B60L11/1816 ,  B60L11/1844 ,  B60L11/1861 ,  B60L2210/30 ,  B60L2240/547 ,  B60L2240/549 ,  H02J7/022 ,  H02M1/12 ,  H02M1/4216 ,  H02M1/4233 ,  H02M3/1584 ,  H02M2001/0025 ,  H02M2001/0064 ,  H02M2001/007 ,  Y02E40/40 ,  Y02E60/721 ,  Y02T10/7005 ,  Y02T10/7044 ,  Y02T10/705 ,  Y02T10/7072 ,  Y02T10/7241 ,  Y02T10/92 ,  Y02T90/121 ,  Y02T90/127 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/163 ,  Y04S10/126

公开(公告)号：EP2043241B1

公开(公告)日：2017-12-27

申请号：EP08165216.6

申请日：2008-09-26

Applicant: Rockwell Automation Technologies, Inc.

Inventor： Pande, Manish ,  Li, Yunwei

IPC: H02M1/42 ,  H02P23/26 ,  H02M5/45 ,  H02M5/458

CPC classification number: H02M5/4585 ,  H02M1/4216 ,  H02M1/4233 ,  H02M5/4505 ,  H02P23/26 ,  H02P2201/15 ,  Y02B70/126 ,  Y02P80/112

Abstract: The switching rectifier and switching inverter on a motor drive unit are modulated to indirectly change the magnitude of current and voltage stored in DC link by controlling the magnetic field of the motor to correct for both power factor lead and power factor lag over a wide range of motor speeds and conditions while maintaining a predetermined motor operating point.

公开(公告)号：EP3197033A1

公开(公告)日：2017-07-26

申请号：EP15842605.6

申请日：2015-09-17

Applicant: Universidade Federal De Minas Gerais - UFMG

Inventor： DE JESUS CARDOSO FILHO, Braz ,  MORAIS PARREIRAS, Thiago

IPC: H02M1/12 ,  H02M7/68

CPC classification number: H02J3/01 ,  H02M1/12 ,  H02M1/4216 ,  H02M5/4585 ,  H02M7/68 ,  H02P23/26 ,  H02P27/08 ,  Y02B70/126

Abstract: The present patent application relates to a method and equipment for eliminating harmonics based on two complementary techniques, namely the elimination of harmonics by selective harmonic elimination pulse-width modulation in conjunction with the multiple-wiring transformer. The association of these two resources is capable of reducing the harmonic distortion of currents to extremely low values, providing a truly unitary power factor. The technology is suitable for low and medium intensity alternating current - direct current and direct current - alternating current converters, which make interface with the electricity network and should have low harmonic distortion of the current because of the high power value involved, and also because of fragility of the electricity network (low power of short circuit at the coupling point).

Abstract translation: 本专利申请涉及基于两种互补技术消除谐波的方法和设备，即通过结合多重接线变压器通过选择性谐波消除脉冲宽度调制消除谐波。 这两种资源的关联能够将电流的谐波失真降低至极低值，从而提供真正的单一功率因数。 该技术适用于与电网接口的中低强度交流 - 直流和直流 - 交流转换器，由于涉及的功率值较高，因此应该具有较低的电流谐波失真，并且还因为 电网的脆弱性（耦合点短路功率低）。

公开(公告)号：EP2615732A4

公开(公告)日：2017-06-28

申请号：EP11823389

申请日：2011-08-18

Applicant: HITACHI INDUSTRY EQUIPMENT SYSTEMS CO LTD

Inventor： NOTOHARA YASUO ,  IWASE YUTA ,  SANO MASAHIRO ,  LI DONGSHENG

IPC: H02M7/217 ,  H02M1/42

CPC classification number: H02M1/4216 ,  H02M7/217 ,  Y02B70/126