SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG
    2.
    发明授权
    SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG 有权
    电路,用于产生参考电流和振荡器电路与电路

    公开(公告)号:EP1481469B1

    公开(公告)日:2008-11-12

    申请号:EP03704288.4

    申请日:2003-02-04

    发明人: OEHM, Jürgen

    IPC分类号: H03B1/04

    摘要: Disclosed is a circuit system generating a reference current (Iref) and an oscillator circuit which comprises said circuit system and a capacitor (8) that is connected to the input of a voltage-controlled source of electric power (1). Said capacitor (8) is triggered by two inter-switchable amplifiers (4, 6) with different driving capacities (gm1, gm2). According to said principle, an LC oscillator (14), for example, can be electrically controlled while being fed with the reference current (Iref) at a particularly low noise level.

    Circuit de correction du déphasage et des amplitudes
    4.
    发明公开
    Circuit de correction du déphasage et des amplitudes 失效
    Phasenverschiebungs- und Amplitudenkorrekturschaltung。

    公开(公告)号:EP0647031A1

    公开(公告)日:1995-04-05

    申请号:EP94115124.3

    申请日:1994-09-26

    IPC分类号: H03L7/06 H03D1/22

    摘要: Le circuit de correction comprend un premier comparateur de phases à quadrature (7,9) prévu pour recevoir en entrée deux signaux (I,Q) dont on voudrait qu'ils soient en quadrature et d'amplitudes égales. Des moyens d'ajustement de la phase sont tout d'abord prévus pour corriger la phase d'au moins un des signaux pour rétablir un déphasage de 90° entre ceux-ci. Le circuit de correction comprend, de plus, des moyens (13,15) pour effectuer la somme et la différence des sigaux (I,Q) qu'il reçoit en entrée et pour fournir cette somme et cette différence à un deuxième comparateur de phases à quadrature (17,19) prévu pour fournir en sortie un deuxième signal d'erreur représentatif de l'écart entre le déphasage effectif de ces signaux calculés et 90°. Le deuxième signal d'erreur est, finalement fourni à des moyens d'ajustement d'amplitude (60,66) prévus pour corriger l'amplitude d'au moins un desdits signaux (I,Q).

    摘要翻译: 连接电路包括用于接收作为输入的两个信号(I,Q)的第一正交相位比较器(7,9),期望它们应该是正交和相等的幅度。 首先提供相位调整装置以校正至少一个信号的相位,以便在它们之间重新建立90°的相移。 校正电路还包括用于执行其接收的信号(I,Q)的和之和和作为输入的差值的装置(13,15),并将该和和该差值提供给第二正交相位比较器(17, 19)用于提供第二误差信号作为输出,表示这些计算出的信号的实际相移与90°之间的差异。 最后,第二误差信号被馈送到旨在校正至少一个所述信号(I,Q)的振幅的幅度调节装置(60,66)。

    VOLTAGE CONTROLLED OSCILLATOR INCLUDING MUGFETS
    5.
    发明公开
    VOLTAGE CONTROLLED OSCILLATOR INCLUDING MUGFETS 审中-公开
    包含MUFTETS的电压控制振荡器

    公开(公告)号:EP3235122A1

    公开(公告)日:2017-10-25

    申请号:EP15798642.3

    申请日:2015-11-12

    申请人: Xilinx, Inc.

    IPC分类号: H03B5/12

    摘要: Voltage-controlled oscillation (100) is described. In an apparatus therefor, an inductor (120) has a tap and has or is coupled to a positive-side output node (105) and a negative side output node (106). The tap is coupled to receive a first current. A coarse grain capacitor array (130) is coupled to the positive-side output node (105) and the negative side output node (106) and is coupled to respectively receive select signals (168). A varactor (140) is coupled to the positive-side output node (105) and the negative side output node (106) and is coupled to receive a control voltage (143). The varactor (140) includes MuGFETs (141, 142). A transconductance cell (150) is coupled to the positive- side output node (105) and the negative side output node (106), and the transconductance cell (150) has a common node (107). A frequency scaled resistor network (160) is coupled to the common node (107) and is coupled to receive the select signals (168) for a resistance for a path for a second current.

    摘要翻译: 描述电压控制振荡(100)。 在其设备中,电感器(120)具有抽头并且具有或者耦合到正侧输出节点(105)和负侧输出节点(106)。 抽头被耦合以接收第一电流。 粗粒度电容器阵列(130)耦合到正侧输出节点(105)和负侧输出节点(106)并且被耦合以分别接收选择信号(168)。 变容二极管(140)耦合到正侧输出节点(105)和负侧输出节点(106)并且被耦合以接收控制电压(143)。 变容二极管(140)包括MuGFET(141,142)。 跨导单元(150)耦合到正侧输出节点(105)和负侧输出节点(106),并且跨导单元(150)具有公共节点(107)。 频率调节电阻网络(160)耦合到公共节点(107)并且被耦合以接收用于第二电流的路径的电阻的选择信号(168)。

    SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG
    6.
    发明公开
    SCHALTUNGSANORDNUNG ZUR ERZEUGUNG EINES REFERENZSTROMES UND OSZILLATORSCHALTUNG MIT DER SCHALTUNGSANORDNUNG 有权
    电路,用于产生参考电流和振荡器电路与电路

    公开(公告)号:EP1481469A2

    公开(公告)日:2004-12-01

    申请号:EP03704288.4

    申请日:2003-02-04

    发明人: OEHM, Jürgen

    IPC分类号: H03B1/04

    摘要: Disclosed is a circuit system generating a reference current (Iref) and an oscillator circuit which comprises said circuit system and a capacitor (8) that is connected to the input of a voltage-controlled source of electric power (1). Said capacitor (8) is triggered by two inter-switchable amplifiers (4, 6) with different driving capacities (gm1, gm2). According to said principle, an LC oscillator (14), for example, can be electrically controlled while being fed with the reference current (Iref) at a particularly low noise level.

    Oscillation circuit with voltage-controlled oscillators
    7.
    发明公开
    Oscillation circuit with voltage-controlled oscillators 审中-公开
    振荡器电路与电压控制振荡器

    公开(公告)号:EP1225689A3

    公开(公告)日:2003-05-14

    申请号:EP02250050.8

    申请日:2002-01-04

    申请人: TDK Corporation

    IPC分类号: H03B5/12 H03B27/00

    摘要: An oscillation circuit including first and second voltage-controlled oscillators (VC01, VC02) each having a resonance circuit including a pair of varactor diodes (61, 62, 71, 72), and first and second buffer amplifiers (BAMP1, BAMP2) for feeding-back high frequency signals generated from the first and second voltage-controlled oscillators (VC01, VC02) to the second and first voltage-controlled oscillators (VC02, VC01), respectively. A control voltage (Vc) is applied to the varactor diodes (61, 62, 71, 72) to generate output high frequency signals having a same frequency and a mutual phase difference of 90 degrees from the first and second voltage-controlled oscillators (VC01, VC02). By adjusting an amplitude of the control voltage (Vc), resonant points of the resonance circuits of the first and second voltage-controlled oscillators (VC01, VC02) are changed and the frequency of the output high frequency signals is changed, while phase noise can be sufficiently suppressed over a wide frequency range and a power consumption can be lowered.

    Wideband oscillator with bias compensation
    8.
    发明公开
    Wideband oscillator with bias compensation 失效
    带偏置补偿的宽带振荡器

    公开(公告)号:EP0501620A1

    公开(公告)日:1992-09-02

    申请号:EP92300951.8

    申请日:1992-02-04

    IPC分类号: H03L1/00

    摘要: An RF oscillator (10) is disclosed that can be tuned to operate over a wide range of frequencies while maintaining advantageous bias conditions. The oscillator includes circuitry (32) that adjusts an oscillator bias signal in response to changes in oscillator frequency and/or ambient temperature, and does so without resort to using the same signal for both bias and frequency control. By so doing, both the frequency range and temperature range of an oscillator can be extended, while simultaneously improving the oscillator's performance.

    摘要翻译: 公开了一种RF振荡器(10),其可以被调谐以在宽范围的频率上操作,同时保持有利的偏置条件。 该振荡器包括响应于振荡器频率和/或环境温度的变化来调整振荡器偏置信号的电路(32),并且这样做并不是为了偏置和频率控制都使用相同的信号。 通过这样做,可以扩展振荡器的频率范围和温度范围,同时改善振荡器的性能。

    SYSTEM AND METHOD FOR DYNAMICALLY BIASING OSCILLATORS FOR OPTIMUM PHASE NOISE
    10.
    发明公开
    SYSTEM AND METHOD FOR DYNAMICALLY BIASING OSCILLATORS FOR OPTIMUM PHASE NOISE 审中-公开
    用于动态偏置最佳相位噪声的振荡器的系统和方法

    公开(公告)号:EP3243272A1

    公开(公告)日:2017-11-15

    申请号:EP15805682.0

    申请日:2015-11-20

    IPC分类号: H03B5/12

    摘要: Systems and methods for biasing frequency oscillators to minimize phase noise are disclosed. The system may comprise a tank circuit having an inductor, at least a first coupling capacitor and a second coupling capacitor. The system may further comprise a varactor circuit electrically connected to the first coupling capacitor and the second coupling capacitor. The system may further comprise at least one first metal oxide semiconductor (MOS) device electrically connected in shunt with the tank circuit and a bias voltage. The at least one first MOS device may be electrically connected to a first gate bias voltage configured to bias the at least one first MOS device such that a first gate-to-source voltage of the at least one first MOS device remains below the first threshold voltage.