公开(公告)号：EP4407874A2

公开(公告)日：2024-07-31

申请号：EP24181465.6

申请日：2020-09-03

申请人： Silicon Storage Technology Inc.

发明人： TRAN, Hieu Van ,  VU, Thuan ,  TRINH, Stephen ,  HONG, Stanley ,  LY, Anh ,  TIWARI, Vipin

IPC分类号： H03M1/56

CPC分类号： G11C7/12 ,  G11C7/14 ,  G11C11/54 ,  G11C16/0425 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3427 ,  H03F3/45475 ,  H03F2203/4552620130101 ,  H03F2203/4553620130101 ,  H03M1/468 ,  H03M1/164 ,  H03M1/145 ,  G06N3/063 ,  H03M1/56 ,  G06N3/065 ,  G06N3/048 ,  G06N3/045

摘要： Numerous embodiments of analog neural memory arrays are disclosed. In certain embodiments, each memory cell in the array has an approximately constant source impedance when that cell is being operated. In certain embodiments, power consumption is substantially constant from bit line to bit line within the array when cells are being read. In certain embodiments, weight mapping is performed adaptively for optimal performance in power and noise.

公开(公告)号：EP4115423B1

公开(公告)日：2024-07-24

申请号：EP20781134.0

申请日：2020-09-03

IPC分类号： G11C11/54 ,  G11C7/12 ,  G11C7/14 ,  G11C16/08 ,  G11C16/04 ,  G11C16/24 ,  G11C16/26 ,  G11C16/34 ,  G06N3/045 ,  G06N3/063 ,  G06N3/065 ,  H03F3/45 ,  H03M1/14 ,  H03M1/16 ,  H03M1/46 ,  H03M1/56

CPC分类号： G11C7/12 ,  G11C7/14 ,  G11C11/54 ,  G11C16/0425 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3427 ,  H03F3/45475 ,  H03F2203/4552620130101 ,  H03F2203/4553620130101 ,  H03M1/468 ,  H03M1/164 ,  H03M1/145 ,  G06N3/063 ,  H03M1/56 ,  G06N3/065 ,  G06N3/048 ,  G06N3/045