专利检索 ap:("Silicon Storage Technology Inc.") AND inv:"HONG, Stanley" 第 1 页

1.

发明公开
IMPROVED CHARGE PUMP FOR USE IN NON-VOLATILE FLASH MEMORY DEVICES 审中-公开

公开(公告)号：EP4202929A1

公开(公告)日：2023-06-28

申请号：EP23156743.9

申请日：2019-07-25

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu Van , LY, Anh , VU, Thuan , NGUYEN, Kha , PHAM, Hien , HONG, Stanley , TRINH, Stephen, T.

IPC分类号： G11C5/14 , G11C7/22 , G11C16/30 , G11C16/32 , G11C16/04 , H02M3/07

摘要： Numerous embodiments of an improved charge pump design are disclosed for generating the high voltages necessary to perform erase and program operations in non-volatile flash memory devices. In these embodiments, each boost stage in the charge pump is modified to overcome a deficiency in prior art charge pumps whereby voltage actually would decrease in the final boost stage. These modifications include the addition of one or more of a clock doubling circuit, a local self-precharge circuit, a feed-forward precharge circuit, a feed-backward precharge circuit, and a hybrid circuit comprising NMOS and PMOS transistors and diodes.

2.

发明公开
IMPROVED SENSE AMPLIFIER CIRCUIT FOR READING DATA IN A FLASH MEMORY CELL 审中-公开

公开(公告)号：EP4160601A1

公开(公告)日：2023-04-05

申请号：EP22208316.4

申请日：2018-07-09

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , HONG, Stanley

IPC分类号： G11C16/28 , G11C16/34 , G11C7/06

摘要： Numerous embodiments for an improved sense amplifier circuit for reading data in a flash memory cell are disclosed. The embodiments each compare current or voltage measurements from a data block with a reference block to determine the value stored in the selected memory cell in the data block. The use of one or more localized boost circuits allow the embodiments to utilize lower operating voltages than prior art sense amplifier circuits, resulting in reduced power consumption.

3.

发明公开
ANALOG NEURAL MEMORY ARRAY IN ARTIFICIAL NEURAL NETWORK WITH SOURCE LINE PULLDOWN MECHANISM 审中-公开

公开(公告)号：EP4150621A1

公开(公告)日：2023-03-22

申请号：EP20824005.1

申请日：2020-11-16

申请人： Silicon Storage Technology Inc.

发明人： TRAN, Hieu Van , VU, Thuan , HONG, Stanley , TRINH, Stephen , TRAN, Han , TIWARI, Vipin , PHAM, Hien

IPC分类号： G11C11/54 , G11C16/04 , G11C16/30

4.

发明公开
METHOD AND APPARATUS FOR HIGH VOLTAGE GENERATION FOR ANALOG NEURAL MEMORY IN DEEP LEARNING ARTIFICIAL NEURAL NETWORK 审中-公开

公开(公告)号：EP3788625A1

公开(公告)日：2021-03-10

申请号：EP19796373.9

申请日：2019-04-08

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , HONG, Stanley , TIWARI, Vipin , DO, Nhan

IPC分类号： G11C16/10 , G11C16/30 , G11C16/12 , G11C16/34

5.

发明公开
PROGRAMMABLE NEURON FOR ANALOG NON-VOLATILE MEMORY IN DEEP LEARNING ARTIFICIAL NEURAL NETWORK 审中-公开

公开(公告)号：EP3735656A1

公开(公告)日：2020-11-11

申请号：EP18898774.7

申请日：2018-11-29

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu, Van , HONG, Stanley , LY, Anh , VU, Thuan , PHAM, Hien , NGUYEN, Kha , TRAN, Han

IPC分类号： G06N3/04 , G06N3/063

6.

发明公开
INPUT CIRCUITRY FOR ANALOG NEURAL MEMORY IN A DEEP LEARNING ARTIFICIAL NEURAL NETWORK 审中-实审

公开(公告)号：EP4381502A1

公开(公告)日：2024-06-12

申请号：EP21823704.8

申请日：2021-11-13

申请人： Silicon Storage Technology Inc.

发明人： TRAN, Hieu Van , NGUYEN, Kha , VU, Thuan , PHAM, Hien , HONG, Stanley , TRINH, Stephen

IPC分类号： G11C7/10 , G06N3/063 , G11C11/54 , G11C11/56 , G11C27/02

CPC分类号： G11C11/54 , G11C11/5628 , G11C7/1006 , G11C27/024 , G11C27/028 , G06N3/0442 , G06N3/048 , G06N3/065

7.

发明公开
SPLIT ARRAY ARCHITECTURE FOR ANALOG NEURAL MEMORY IN A DEEP LEARNING ARTIFICIAL NEURAL NETWORK 审中-实审

公开(公告)号：EP4341934A1

公开(公告)日：2024-03-27

申请号：EP21778651.6

申请日：2021-09-02

申请人： SILICON STORAGE TECHNOLOGY, INC.

发明人： TRAN, Hieu Van , VU, Thuan , HONG, Stanley , TRINH, Stephen , LY, Anh

IPC分类号： G11C11/54 , G06N3/063

8.

发明公开
INPUT AND DIGITAL OUTPUT MECHANISMS FOR ANALOG NEURAL MEMORY IN A DEEP LEARNING ARTIFICIAL NEURAL NETWORK 审中-公开

公开(公告)号：EP4268228A1

公开(公告)日：2023-11-01

申请号：EP21718319.3

申请日：2021-03-17

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu Van , VU, Thuan , TRINH, Stephen , HONG, Stanley , LE, Toan , LE, Nghia , PHAM, Hien

IPC分类号： G11C11/54 , G11C16/26 , G06N3/063

9.

发明公开
ANALOG NEURAL MEMORY SYSTEM FOR DEEP LEARNING NEURAL NETWORK COMPRISING MULTIPLE VECTOR-BY-MATRIX MULTIPLICATION ARRAYS AND SHARED COMPONENTS 审中-公开

公开(公告)号：EP4202769A1

公开(公告)日：2023-06-28

申请号：EP23157551.5

申请日：2019-07-09

申请人： Silicon Storage Technology, Inc.

发明人： TRAN, Hieu Van , VU, Thuan , LY, Anh , HONG, Stanley

IPC分类号： G06N3/0442 , G06N3/045 , G06N3/065 , G06F17/16 , G11C11/54 , G11C16/04 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/34 , H01L29/423

摘要： Numerous embodiments are disclosed for an analog neuromorphic memory system for use in a deep learning neural network. The analog neuromorphic memory system comprises a plurality of vector-by-matrix multiplication arrays and various components shared by those arrays. The shared components include high voltage generation blocks, verify blocks, and testing blocks. The analog neuromorphic memory system optionally is used within a long short term memory system or a gated recurrent unit system.

10.

发明公开
HIGH PRECISION AND HIGHLY EFFICIENT TUNING MECHANISMS AND ALGORITHMS FOR ANALOG NEUROMORPHIC MEMORY IN ARTIFICIAL NEURAL NETWORKS 审中-公开

公开(公告)号：EP4116979A1

公开(公告)日：2023-01-11

申请号：EP22187616.2

申请日：2018-10-30

申请人： Silicon Storage Technology Inc.

发明人： TRAN, Hieu Van , TIWARI, Vipin , DO, Nhan , LEMKE, Steven , HARIHARAN, Santosh , HONG, Stanley

IPC分类号： G11C11/54 , G11C11/56 , G11C16/10 , G11C16/26 , G11C16/34 , G11C16/24 , G11C16/16 , G11C16/12 , G11C16/04

摘要： An artificial neural network device that utilizes analog neuromorphic memory that comprises one or more non-volatile memory arrays. The embodiments comprise improved mechanisms and algorithms for tuning the non-volatile memory arrays such that the floating gates of the memory cells can be quickly and accurately injected with the desired amount of charge to signify an analog value utilized as a weight by the artificial neural network.