公开(公告)号：EP3353965A1

公开(公告)日：2018-08-01

申请号：EP16767490.2

申请日：2016-09-09

Applicant: Qualcomm Incorporated

Inventor： CHENG, Scott Wang-Yip ,  KHAN, Raheel ,  BANTVAL, Vijay ,  BAHN, Jun Ho

IPC: H04L12/933 ,  H04L12/42

CPC classification number: H04L45/74 ,  H04L1/0018 ,  H04L12/4135 ,  H04L12/42 ,  H04L12/4637 ,  H04L45/22 ,  H04L45/306 ,  H04L49/102 ,  H04L49/109

Abstract: Various aspects of this disclosure describe a bi-directional, dual interconnect bus configured in a ring to route data to processors implementing modem functions. A plurality of nodes may be coupled to form a ring bus comprising at least two interconnect rings. A plurality of processors may be assigned to the plurality of nodes. A first processor among the plurality of processors may be configured to process a first data type, and a second processor among the plurality of processors may be configured to process a second data type. Data on the ring bus may be separated into the first data type and the second data type, and separated data of the first data type may be routed on one interconnect ring to the first processor and separated data of the second data type may be routed on another interconnect ring to the second processor.

公开(公告)号：EP1892905B1

公开(公告)日：2018-04-11

申请号：EP07253247.6

申请日：2007-08-17

Applicant: Juniper Networks, Inc.

Inventor： Sindhu, Pradeep

IPC: H04L12/933 ,  H04L12/931 ,  H04L12/947 ,  H04L12/721 ,  H04J14/02 ,  H04Q11/00

CPC classification number: H04J14/0227 ,  H04J14/0241 ,  H04J14/0257 ,  H04J14/0267 ,  H04J14/028 ,  H04L45/62 ,  H04L49/101 ,  H04L49/102 ,  H04L49/25 ,  H04L49/40 ,  H04Q11/0005 ,  H04Q2011/0039 ,  H04Q2011/0052

Abstract: A multi-chassis network device (120) includes a plurality of nodes (128A-D) that operate as a single device within the network and a switch fabric (125A-D) that forwards data plane packets between the plurality of nodes (128A-D). The switch fabric (125A-D) includes a set of multiplexed optical interconnects coupling the nodes (128A-D). For example, a multi-chassis router (120) includes a plurality of routing nodes (128A-D) that operate as a single router within a network and a switch fabric (125A-D) that forwards packets between the plurality of routing nodes (128A-D). The switch fabric (125A-D) includes at least one multiplexed optical interconnect coupling the routing nodes (128A-D). The nodes (128A-D) of the multi-chassis router (120) may direct portions of the optical signal over the multiplexed optical interconnect to different each other using wave-division multiplexing.

公开(公告)号：EP2930896B1

公开(公告)日：2016-11-02

申请号：EP15159647.5

申请日：2015-03-18

Applicant: DVE Progettazione Elettronica di Brugnoni Gabriele

Inventor： Brugnoni, Gabriele

IPC: H04L12/933

CPC classification number: H04L49/102

公开(公告)号：EP2963877A1

公开(公告)日：2016-01-06

申请号：EP15160593.8

申请日：2015-03-24

Applicant: Juniper Networks, Inc.

Inventor： Kompella, Kireeti

IPC: H04L12/917 ,  H04L12/723 ,  H04L12/913 ,  H04L12/911 ,  H04L12/24

CPC classification number: H04L45/507 ,  H04L41/0896 ,  H04L47/13 ,  H04L47/724 ,  H04L47/76 ,  H04L47/825 ,  H04L49/102

Abstract: Techniques are described for specifying and constructing multi-protocol label switching (MPLS) rings. Routers may signal membership within MPLS rings and automatically establish ring-based label switch paths (LSPs) as components of the MPLS rings for packet transport within ring networks. In one example, a router includes a processor configured to establish an MPLS ring having a plurality of ring LSPs. Each of the ring LSPs is configured to transport MPLS packets around the ring network to a different one of the routers operating as an egress router for the respective ring LSP. Moreover, each of the ring LSPs comprises a bidirectional, multipoint-to-point (MP2P) LSP for which any of the routers can operate as an ingress to source packet traffic into the ring LSP for transport to the respective egress router for the ring LSP. Separate protection paths, bypass LSPs, detours or loop-free alternatives need not be signaled.

Abstract translation: 描述了用于指定和构造多协议标签交换（MPLS）环的技术。 路由器可以在MPLS环内通知成员关系，并自动建立环形标签交换路径（LSP）作为环形网络中的分组传输的MPLS环的组件。 在一个示例中，路由器包括被配置为建立具有多个环形LSP的MPLS环的处理器。 每个环形LSP被配置为将环形网络周围的MPLS分组传送到作为相应环形LSP的出口路由器的另一个路由器。 此外，每个环形LSP包括双向多点到多点（MP2P）LSP，其中任何一个路由器都可以作为入口将数据包流量输入到环形LSP中，以传输到相应的出口路由器进行环形LSP 。 不需要发出单独的保护路径，旁路LSP，绕道或无环路替代方案。

公开(公告)号：EP1162794B1

公开(公告)日：2014-02-26

申请号：EP01305062.0

申请日：2001-06-11

Applicant: Broadcom Corporation

Inventor： Kalkunte, Mohan,c/o Broadcom Corporation ,  Ambe, Shekhar,c/o Broadcom Corporation ,  Kadambi,Shiri,c/o Broadcom Corporation

IPC: H04L12/70

CPC classification number: H04L47/2458 ,  H04L12/462 ,  H04L45/00 ,  H04L45/16 ,  H04L45/245 ,  H04L45/52 ,  H04L45/742 ,  H04L47/10 ,  H04L47/266 ,  H04L47/29 ,  H04L47/32 ,  H04L49/102 ,  H04L49/109 ,  H04L49/15 ,  H04L49/3009 ,  H04L49/3018 ,  H04L49/3036 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/506 ,  H04L49/508 ,  H04L49/602 ,  H04L69/22 ,  Y02D50/30

Abstract: A data switch for network communications includes a first data port interface which supports at least one data port which transmits and receives data. A second data port interface is also provided supporting at least one data port transmitting and receiving data. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. A common memory is provided, and communicates with the first data port interface and the second data port interface. A memory management unit is provided, and communicates data from the first data port interface and the second data port interface and an common memory. At least two sets of communication channels are provided, with each of the communication channels communicating data and messaging information between the first data port interface, the second data port interface, and the memory management unit. One of the first data port interface and the second data port interface is configured to determine forwarding information from a flexible length header for an incoming data packet received at a port of the one data port interface, and is configured to determine the forwarding information by shifting the information field positions read from the flexible length header.

公开(公告)号：EP2197218B1

公开(公告)日：2012-10-17

申请号：EP07845686.0

申请日：2007-11-23

Applicant: ZTE Corporation

Inventor： XIA, Liang ,  HUANG, Jianhui ,  YUAN, Yan

IPC: H04Q3/52 ,  H04J3/16 ,  H04L12/56

CPC classification number: H04J3/1611 ,  H04J2203/0008 ,  H04J2203/0012 ,  H04J2203/0082 ,  H04L49/101 ,  H04L49/102 ,  H04L49/1523 ,  H04L49/557

公开(公告)号：EP1673683A4

公开(公告)日：2010-06-02

申请号：EP04795050

申请日：2004-10-12

Applicant: RAPTOR NETWORKS TECHNOLOGY INC

Inventor： PERERA ANANDA ,  HOFFMAN EDWIN

IPC: H04L12/56 ,  G06F20060101

CPC classification number: H04L49/351 ,  H04L49/102 ,  H04L49/3009 ,  H04L49/552

公开(公告)号：EP2042999A1

公开(公告)日：2009-04-01

申请号：EP08021459.6

申请日：2005-03-11

Applicant: Sonics, Inc.

Inventor： Weber, Wolf-Dietrich ,  Harwood, Joseph ,  Meyer, Michael ,  Wingard, Drew

IPC: G06F13/28 ,  G06F13/36 ,  G06F13/14 ,  G06F13/38 ,  H04L12/56

CPC classification number: H04L49/25 ,  H04L49/102

Abstract: Various methods and apparatuses are described for a communication system. The communication system may include an initiator core supporting a first burst capability and a target core supporting a second burst capability, wherein the support burst features of the second burst capability differs from the support burst features of the first burst capability. The communication system may also comprise an interconnect coupled to the initiator core and the target core. Furthermore, the communication system may include a target agent coupled to the target core and an initiator agent coupled to the initiator core, wherein the initiator agent includes an end-to-end burst conversion mechanism to allow the initiator and target cores to communicate, by generating burst conversion signals, independent of the initiator and target cores needing to adapt their burst capabilities.

Abstract translation: 对于通信系统描述了各种方法和装置。 通信系统可以包括支持第一突发能力的发起者核心和支持第二突发能力的目标核心，其中第二突发能力的支持突发特征与第一突发能力的支持突发特征不同。 通信系统还可以包括耦合到发起者核心和目标核心的互连。 此外，通信系统可以包括耦合到目标核心的目标代理和耦合到启动器核心的启动器代理，其中发起方代理包括端到端突发转换机制以允许发起者和目标核心通过 产生突发转换信号，独立于启动器和需要适应其突发能力的目标核心。

公开(公告)号：EP1891778B1

公开(公告)日：2009-03-25

申请号：EP06756052.4

申请日：2006-06-02

Applicant: Koninklijke Philips Electronics N.V.

Inventor： RADULESCU, Andrei, Société Civile SPID

IPC: H04L12/56

CPC classification number: H04L49/205 ,  H04L49/102 ,  H04L49/3045 ,  H04L49/35

Abstract: An electronic device is provided comprising an interconnect means (N, sw0-sw2) for connecting a plurality of modules (IP); and at least one network interface (NI) for coupling at least one of the plurality of modules (IP) to the interconnect means (N; sw0-sw2) and for packetizing data from the modules (IP) into first packets (pck). The communication over the interconnect (N; sw0-sw2) is based on time slots, wherein a second packet (µpck) is transferred during one time slot. A data traffic over the interconnect means (N; sw0-sw2) comprises at least one guaranteed service traffic class (GS) and/or at least one best-effort service traffic class (BE). First packets (GSpck) relating to the at least one guaranteed service traffic class (GS) are transferred in second packets (µpck) within time slots reserved for the guaranteed service traffic class (GS). First packets (pckl-pck6) relating to the at least one best-effort service traffic class (BE) are transferred within unreserved second packets (µpck) and/or within unused portions (uu) of the second packets (µpck).

公开(公告)号：EP1162796A3

公开(公告)日：2009-03-18

申请号：EP01305065.3

申请日：2001-06-11

Applicant: Broadcom Corporation

Inventor： Kalkunte, Mohan.c/o Broadcom Corporation ,  Ambe, Shekhar.c/o Broadcom Corporation ,  Kadambi, Shiri.c/o Broadcom Corporation

IPC: H04L12/56 ,  H04L12/46 ,  H04L12/44

CPC classification number: H04L47/2458 ,  H04L12/462 ,  H04L45/00 ,  H04L45/16 ,  H04L45/245 ,  H04L45/52 ,  H04L45/742 ,  H04L47/10 ,  H04L47/266 ,  H04L47/29 ,  H04L47/32 ,  H04L49/102 ,  H04L49/109 ,  H04L49/15 ,  H04L49/3009 ,  H04L49/3018 ,  H04L49/3036 ,  H04L49/351 ,  H04L49/352 ,  H04L49/354 ,  H04L49/506 ,  H04L49/508 ,  H04L49/602 ,  H04L69/22 ,  Y02D50/30

Abstract: A method of handling data packets in a series of network switches includes receiving an incoming data packet at a data port of a first switch of the series of network switches. A module id bitmap of the incoming data packet is resolved and a bit corresponding to the first switch of the module id bitmap is examined to determine if the bit is set. A destination address of the incoming data packet is resolved when the corresponding bit is set and the incoming data packet is forwarded or dropped based on the destination address. When the corresponding bit is not set, the incoming data packet is forwarded to a next switch of the series of network switches. A network switch configured to allow for cascading of data packets is also disclosed.