公开(公告)号：EP4443308A1

公开(公告)日：2024-10-09

申请号：EP22914972.9

申请日：2022-12-28

申请人： Huawei Technologies Co., Ltd.

发明人： NIE, Er

IPC分类号： G06F13/40 ,  G06F13/42 ,  G06F1/3228 ,  G06F1/3234 ,  G06F1/04

CPC分类号： G06F13/40 ,  G06F13/42 ,  G06F1/3228 ,  G06F1/04 ,  G06F1/3234 ,  Y02D10/00

摘要： Embodiments of this application relate to the field of chip technologies, and provide a high-speed serial interface and a data transmission method, to reduce power consumption of a physical layer circuit of a high-speed serial interface when no service data is being sent. The high-speed serial interface includes a physical layer circuit at a transmit end, a monitor, a clock gating circuit, a control bitstream generation circuit, and a random bitstream generation circuit, and further includes: The monitor is configured to: when no service data is being sent, indicate the clock gating circuit to stop sending a clock signal to partial modules in the physical layer circuit at the transmit end. The control bitstream generation circuit sends a first control bitstream through a serializer/deserializer, to indicate that the transmit end has turned off partial modules in the physical layer circuit at the transmit end, or indicate that the transmit end is to turn off partial modules in the physical layer circuit at the transmit end, or indicate a receive end to turn off partial modules in a physical layer circuit at the receive end. The random bitstream generation circuit sends a random bitstream. Embodiments of this application are used in a process of reducing power consumption of a physical layer circuit.

公开(公告)号：EP4369208A1

公开(公告)日：2024-05-15

申请号：EP22930523.0

申请日：2022-08-02

申请人： Shenzhen Hangshun Chip Technology Development Co., Ltd

发明人： LIU, Jiping ,  MAO, Haixu ,  WANG, Xiang

IPC分类号： G06F13/16 ,  G06F13/40

CPC分类号： Y02D10/00 ,  G06F13/40 ,  G06F13/16

摘要： The present application discloses a data processing method, a computer device and a readable storage medium, the data processing method comprising: obtaining a clock frequency, determining a LATENCY corresponding to a Flash based on the clock frequency, updating the clock frequency based on a current operating mode, adjusting the LATENCY according to the updated clock frequency, and reading and writing data based on the adjusted LATENCY Thus, it is possible to improve the efficiency of the configuration of the LATENCY, avoiding the situation in which the configured MCU chip would still have a system runaway, and thus improve the efficiency of data processing.

公开(公告)号：EP3249543A4

公开(公告)日：2018-04-11

申请号：EP16829550

申请日：2016-01-04

申请人： STATE NUCLEAR POWER AUTOMATION SYSTEM ENG

发明人： ZHANG JIAN ,  JIANG QUNXING ,  WANG XIAOKAI

IPC分类号： G06F13/40

CPC分类号： G06F13/40

摘要： An FPGA-based interface signal remapping method, relates to the technical field of nuclear power system, and solves the technical problems of poor reliability, readability and debuggability in the prior art. The method comprises dividing an internal programmable logic of an FPGA chip into two independent modules, with one module being an I/O module and the other module being a Core module, using the I/O module to process signal excursion occurring when an external signal is input to or output from the FPGA chip, signal collision caused by line multiplexing, metastable state in a data transmission process, and a data transmission error between asynchronous clock domains, using the Core module to implement logical processing and computing; and introducing a master clock signal outside the FPGA chip into the FPGA chip through a global clock pin of the FPGA chip. The method provided in the invention is suitable for a nuclear power protection system platform.

公开(公告)号：EP2568665B1

公开(公告)日：2018-03-14

申请号：EP12739795.8

申请日：2012-01-20

申请人： Huawei Technologies Co., Ltd.

发明人： GAO, Zhihong ,  LI, Ke

IPC分类号： G06F13/38 ,  H04L12/46

CPC分类号： G06F13/385 ,  G06F3/0601 ,  G06F3/0628 ,  G06F13/105 ,  G06F13/20 ,  G06F13/38 ,  G06F13/382 ,  G06F13/40 ,  G06F13/4004 ,  G06F13/4009 ,  G06F13/4045 ,  G06F13/4063 ,  G06F13/4221 ,  G06F13/4265 ,  G06F13/4282 ,  G06F2213/0026 ,  G06F2213/0028 ,  G06F2213/0036 ,  H04L12/4633 ,  H04L2212/00

摘要： A transmission method for broadcast multicast services is disclosed. The method includes: in a cell that adopts frequency reuse, determining a frequency resource occupied by broadcast multicast service data transmitted by a broadcast multicast cell based on a multi-cell transmission mode; selecting a corresponding frequency resource from a frequency band that is occupied by a unicast cell adjacent to the broadcast multicast cell and has the same frequency resource as the determined frequency resource; transmitting, by the unicast cell based on the selected frequency resource and the broadcast multicast cell based on the determined frequency resource, broadcast multicast service data synchronously. The present invention also discloses a transmission system for broadcast multicast services. The present invention can improve the performance of receiving broadcast multicast services by users in a transition zone between the unicast cell and the broadcast multicast cell.

公开(公告)号：EP3249543A1

公开(公告)日：2017-11-29

申请号：EP16829550.9

申请日：2016-01-04

申请人： State Nuclear Power Automation System Engineering

发明人： ZHANG, Jian ,  JIANG, Qunxing ,  WANG, Xiaokai

IPC分类号： G06F13/40

CPC分类号： G06F13/4239 ,  G06F1/12 ,  G06F1/24 ,  G06F5/14 ,  G06F13/40 ,  G06F2205/126

摘要： An FPGA-based interface signal remapping method, relates to the technical field of nuclear power system, and solves the technical problems of poor reliability, readability and debuggability in the prior art. The method comprises dividing an internal programmable logic of an FPGA chip into two independent modules, with one module being an I/O module and the other module being a Core module, using the I/O module to process signal excursion occurring when an external signal is input to or output from the FPGA chip, signal collision caused by line multiplexing, metastable state in a data transmission process, and a data transmission error between asynchronous clock domains, using the Core module to implement logical processing and computing; and introducing a master clock signal outside the FPGA chip into the FPGA chip through a global clock pin of the FPGA chip. The method provided in the invention is suitable for a nuclear power protection system platform.

摘要翻译： 一种基于FPGA的接口信号重映射方法，涉及核电系统技术领域，解决了现有技术中可靠性，可读性和可调性差的技术问题。 该方法包括将FPGA芯片的内部可编程逻辑分成两个独立的模块，一个模块是I / O模块，另一个模块是核心模块，利用I / O模块处理当外部信号 FPGA芯片输入或输出，线路复用引起的信号冲突，数据传输过程中的亚稳态以及异步时钟域之间的数据传输错误，使用Core模块实现逻辑处理和计算; 并通过FPGA芯片的全局时钟引脚将FPGA芯片外部的主时钟信号引入FPGA芯片。 本发明提供的方法适用于核电保护系统平台。

公开(公告)号：EP3182295A1

公开(公告)日：2017-06-21

申请号：EP16186355

申请日：2016-08-30

申请人： VIEWMOVE TECH INC

发明人： JIANG SHYH-BIAU ,  LIU LI-YEH ,  LEE DONG-LIANG ,  HUANG CHUAN-FU ,  HSIAO YUN-SHENG

IPC分类号： G06F13/40 ,  G06F13/42

CPC分类号： G06F13/4282 ,  G06F13/40 ,  G06F2213/0052

摘要： A communication system with serial ports for automatically identifying device types and communication protocols and method thereof are described. The communication system and method are capable of automatically identifying the device types and communication protocols of interface devices with different serial device numbers which are disposed in the serial port architecture. Furthermore, the drivers are capable of performing a serial communication based on the serial port architecture for matching the device types and communication protocols correspondingly, thereby reducing the development and manufacturing costs of communication system. Moreover, the user of an application program module only needs to provide the device numbers and data control information without the cooperation of hardware circuits and manufacturing technique of the interface devices to complete the automatic control and monitoring tasks of the interface devices to increase the utilization convenience.

摘要翻译： 与串行端口的通信系统用于自动识别设备类型和通信协议及其方法进行描述。 的通信系统和方法能够自动地识别设备的类型，并与它们在串行端口架构处理完毕不同的序列的设备号的接口设备的通信协议。 进一步，所述驱动器能够基于串行端口架构用于匹配的设备类型和通信协议相应，从而降低通信系统的开发和制造成本进行串行通信的更上方，应用程序模块的用户只需要 提供没有硬件电路的接口设备的配合和制造技术来完成自动控制和接口设备的监视任务，以增加使用的便利性的设备号和数据控制信息。

公开(公告)号：EP3133796A1

公开(公告)日：2017-02-22

申请号：EP16191580.6

申请日：2013-05-16

申请人： Intel Corporation

发明人： WAGH, Mahesh ,  RANGANATHAN, Sridharan ,  HARRIMAN, David

IPC分类号： H04L29/10 ,  H04L29/06 ,  G06F13/40 ,  G06F13/38 ,  H04L12/933

CPC分类号： G06F13/385 ,  G06F13/40 ,  H04L49/109

摘要： In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.

摘要翻译： 在一个，实施例会聚协议栈可用于统一从第一通信协议通信的第二通信协议来提供用于跨物理互连的数据传送。 这种叠层可以被结合到装置确实包括用于第一通信协议包括事务层和链路层的协议栈，以及耦合到所述协议栈中的物理（PHY）单元，以提供装置和经由耦合到所述设备的装置之间的通信 物理链路。 这个PHY单元可以包括物理单元电路gemäß到所述第二通信协议。 其他实施例中描述并要求保护。

公开(公告)号：EP2997437A4

公开(公告)日：2017-02-22

申请号：EP14797889

申请日：2014-05-15

申请人： TACTOTEK OY

发明人： KERÄNEN ANTTI ,  HARVELA JUHANI

IPC分类号： G06F13/38 ,  G06F13/40 ,  H01Q1/24

CPC分类号： G06F13/40 ,  G06F13/385 ,  G06F13/4009

公开(公告)号：EP2853079A1

公开(公告)日：2015-04-01

申请号：EP13793792.6

申请日：2013-05-16

申请人： Intel Corporation

发明人： RANGANATHAN, Sridharan ,  WAGH, Mahesh ,  HARRIMAN, David J.

IPC分类号： H04L29/10 ,  H04L29/06

CPC分类号： G06F13/385 ,  G06F13/40 ,  H04L49/109

摘要： In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，可以使用融合协议栈来将通信从第一通信协议统一到第二通信协议，以提供通过物理互连的数据传输。 该堆栈可以被包含在包括用于包括事务和链路层的第一通信协议的协议栈和耦合到协议栈以提供设备与耦合到该装置的设备之间的通信的物理（PHY）单元的设备中 一个物理链接。 该PHY单元可以包括根据第二通信协议的物理单元电路。 描述并要求保护其他实施例。

公开(公告)号：EP2756650A1

公开(公告)日：2014-07-23

申请号：EP12756746.9

申请日：2012-09-12

申请人： Continental Teves AG&Co. Ohg

发明人： GÜNTHNER, Stefan ,  RINK, Klaus ,  STÄHLIN, Ulrich ,  KUNZ, Jürgen

IPC分类号： H04L29/08

CPC分类号： G06F13/40 ,  H04L12/40 ,  H04L67/12 ,  H04L2012/40273

摘要： The invention relates to a device (16) for distributing data (56, 64, 68) about a vehicle, comprising: a first sensor data reception interface (26-32, 78) for receiving first sensor data (40-50, 76) from a first sensor (34-38, 52), a second sensor data recognition interface (26-32, 78) for receiving second sensor data (40-50, 76) from a second sensor (34-38, 52), and a transmission interface (33) for transmitting data (56, 64, 68) about the vehicle, on the basis of the first sensor data (40-50, 76) and the second sensor data (40-50, 76), to a receiver (6-12, 60).

摘要翻译： 一种用于分发关于车辆的数据的装置，具有用于从第一传感器接收第一传感器数据的第一传感器数据接收接口，用于从第二传感器接收第二传感器数据的第二传感器数据接收接口和用于发送数据的传输接口 基于第一传感器数据和第二传感器数据到车辆。 包含设备的车辆和车载系统也包括在此。