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    DISPOSITION OF MULTI-ANTENNA AND CONNECTION METHOD THEREFOR
    2.
    发明公开
    DISPOSITION OF MULTI-ANTENNA AND CONNECTION METHOD THEREFOR 审中-实审

    公开(公告)号：EP4398421A1

    公开(公告)日：2024-07-10

    申请号：EP21955912.7

    申请日：2021-08-30

    申请人： Aeterlink Corp.

    发明人： KODATE, Naoto ,  TANABE, Yuji

    IPC分类号： H01Q9/16 ,  H01Q21/20

    CPC分类号： H01Q9/16 ,  H01Q21/20

    摘要： A multi-antenna which is capable of increasing the space efficiency and of avoiding or suppressing the problems of electromagnetic coupling is provided. The multi-antenna include; a substrate; a total of two linear antennas provided in a substantially cross shape to define four regions on the substrate; a total of eight linear antennas that form a substantially cross shape in each of the four regions; a total of four linear antennas provided along four sides of a substantially square shape at outermost positions on the substrate to surround the four regions; and a connecting line provided to connect all of the fourteen linear antennas in a substantially loop shape in a clockwise or anti-clockwise direction.

    RFID TAG AND MANUFACTURING METHOD THEREOF
    5.
    发明公开
    RFID TAG AND MANUFACTURING METHOD THEREOF 审中-公开

    公开(公告)号：EP4266213A1

    公开(公告)日：2023-10-25

    申请号：EP21906577.8

    申请日：2021-12-13

    申请人： Daio Paper Corporation

    发明人： SHIMADA, Takuro ,  KAN, Alina

    IPC分类号： G06K19/077 ,  H01Q9/16

    摘要： Provided is an RFID tag including an inlay that is thin and easy to manufacture.
    The above problem is solved by an RFID tag 10 including an inlay 15 in which an IC chip 12 and an antenna are provided on a base material 11 having a main surface, wherein the antenna includes a loop conductive portion 13 having both end portions connected to the IC chip 12 so as to form a loop shape through the IC chip 12, and a dipole antenna portion 14 disposed to surround the loop conductive portion 13 with an interval allowing inductive coupling, and
    the loop conductive portion 13 and the dipole antenna portion 14 are formed on the main surface to have same thickness based on the main surface, and the IC chip 12 is disposed on both end portions of the loop conductive portion 13.