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公开(公告)号:EP4392970A1
公开(公告)日:2024-07-03
申请号:EP22769496.5
申请日:2022-08-24
Inventor: FERSCH, Christof , NORCROSS, Scott Gregory
IPC: G10L19/16 , H03G7/00 , G10L21/0364 , H03G3/00 , H03G11/00
CPC classification number: G10L19/167 , G10L21/0364 , H03G3/002 , H03G7/007 , H03G11/008
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公开(公告)号:EP4238214A1
公开(公告)日:2023-09-06
申请号:EP22714514.1
申请日:2022-03-24
Applicant: AUDOO LIMITED
Inventor: CLAY, Oliver James
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公开(公告)号:EP4117179A1
公开(公告)日:2023-01-11
申请号:EP21183787.7
申请日:2021-07-05
Applicant: NXP B.V.
Inventor: Gautama, Temujin , Macours, Christophe Marc , Hedebouw, Bram
Abstract: An audio processor and method of audio processing for an amplifier system is described. The audio processor may receive an audio signal and adapt the audio signal generating a time varying offset. The time varying offset may be combined with the audio signal resulting in a shifted the audio signal level. The processed audio signal may also be clipped to remove the negative samples values. The processed signal may be used to drive an amplifier designed to only accept positive (or negative) signals such as a class C amplifier.
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公开(公告)号:EP3358567B1
公开(公告)日:2020-07-22
申请号:EP16850119.5
申请日:2016-06-03
Inventor: ZHAO, Weifeng
IPC: G10L21/003 , G10L21/034 , G10H1/46 , H04M3/56 , H04R3/00 , H03G11/00 , G10H1/36 , H03G3/30 , H04H60/04 , H03G3/34
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公开(公告)号:EP3608909A1
公开(公告)日:2020-02-12
申请号:EP19199358.3
申请日:2014-12-12
Applicant: SONY Corporation
Inventor: Yamamoto, Yuki , Chinen, Toru , Honma, Hiroyuki , Shi, Runyu
IPC: G10L19/26 , G10L19/16 , G10L19/00 , H03G7/00 , H03G11/00 , G10L21/034 , G10L19/005 , H03G9/00
Abstract: The present technology relates to a decoding apparatus, a decoding method and a program which make it possible to obtain sound with higher quality.
A demultiplexing circuit demultiplexes an input code string into a gain code string and a signal code string. A signal decoding circuit decodes the signal code string to output a time series signal. A gain decoding circuit decodes the gain code string. That is, the gain decoding circuit reads out gain values and gain inclination values at predetermined gain sample positions of the time series signal and interpolation mode information. An interpolation processing unit obtains a gain value at each sample position between two gain sample positions through linear interpolation or non-linear interpolation according to the interpolation mode based on the gain values and the gain inclination values. A gain applying circuit adjusts a gain of the time series signal based on the gain values. The present technology can be applied to a decoding apparatus.-
公开(公告)号:EP3525345A3
公开(公告)日:2019-12-11
申请号:EP19155737.0
申请日:2019-02-06
Applicant: Onkyo Corporation
Inventor: OKA, Takuya , TOMITA, Kazuki , KITAZAKI, Tomoki
Abstract: Problem: To provide a device which can suppress temperature rising at low cost. Solution: An AV amplifier 1 includes a volume circuit 4, a tone control circuit 5, a power amplifier 6 which amplifies an audio signal which is output from the volume circuit 4, and a microcomputer 2. When level of the audio signal is not less than a predetermined threshold, the microcomputer 2 increases gain of the audio signal to not less than maximum input voltage of the tone control circuit 5 by the volume circuit 4 and outputs the audio signal in which gain is increased to the tone control circuit 5. Further, the microcomputer 2 decreases gain of the audio signal which is output from the volume circuit 4 by the tone control circuit 5 and outputs the audio signal in which gain is decreased to the volume circuit 4.
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公开(公告)号:EP2041866B1
公开(公告)日:2018-12-26
申请号:EP07789880.7
申请日:2007-07-04
Applicant: NXP B.V.
Inventor: DOOPER, Lutsen , BERKHOUT, Marco
CPC classification number: H03F3/217 , H03F2200/345 , H03F2200/351 , H03F2200/66 , H03F2200/78 , H03G11/008
Abstract: A class D amplifier (1) comprises an input unit (11) for receiving a digital input signal (Vin), a pulse shaping unit (12) for producing pulse shaped signals in dependence of the input signal (Vin), a comparator unit (13) for comparing the pulse shaped signals and producing a comparator signal, a driver unit (14) for producing driver signals in dependence of the comparator signal, a switching output unit (15) for producing a pulse width modulated output signal (Vout) in dependence of the driver signals, and a feedback unit (16) for feeding the output signal (Vout) back to the pulse shaping unit (12). The input unit (11) comprises a clipping control unit (10) for controlling the duty cycle of the pulse width modulated output signal (Vout).
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公开(公告)号:EP2433360B1
公开(公告)日:2018-04-11
申请号:EP09845004.2
申请日:2009-05-18
Applicant: Telefonaktiebolaget LM Ericsson (publ)
Inventor: GUSTAVSSON, Ulf , THOREBÄCK, Johan
IPC: H03F1/26 , H04L27/36 , H04L25/49 , H04B1/04 , H03G1/00 , H03F1/32 , H03F1/02 , H03G3/30 , H03G11/00 , H03F3/24
CPC classification number: H04B1/0475 , H03C2200/0058 , H03F1/0244 , H03F1/3241 , H03F1/3247 , H03F3/24 , H03G3/3042 , H03G11/002 , H04B2001/0408 , H04B2001/0425 , H04L25/49 , H04L25/4902 , H04L27/361 , H04L27/366
Abstract: The invention discloses a transmitter (300, 400, 600) comprising a pulse encoder (305) for creating pulses from the amplitude of an input signal to the transmitter, a compensation signal generator (315) for cancelling quantization noise caused by the pulse encoder (305), a mixer or I/Q modulator (307) for mixing an output of the pulse encoder with the phase of an input signal to the transmitter and an amplifier (320) for creating an output signal from the transmitter. In the transmitter (300, 400, 600), a control signal (CA) for controlling a function of the amplifier (320) comprises an output signal from the compensation signal generator (315), and an input signal to the amplifier (320) comprises an output from the mixer (307) having been modulated (340) to a desired frequency.
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公开(公告)号:EP2296271A4
公开(公告)日:2013-11-20
申请号:EP08765356
申请日:2008-06-09
Applicant: SHIMADZU CORP
Inventor: FURUMIYA TETSUO , OHI JUNICHI
IPC: H03G11/00
CPC classification number: H03G11/002 , H03G11/02
Abstract: The limiter circuit of this invention is a limiter circuit which, by switching action of a pair of transistors, allows passage of only signal voltage components of an input signal voltage included in ranges of an upper limit signal voltage and a lower limit signal voltage. With this construction, the pair of transistors carry out comparisons between the input signal voltage and threshold signal voltages and line switching at the same time. Therefore, there is no influence of propagation delay speed, and no switching noise occurs at times of line switching. Since diodes are not used, a high-speed limiter circuit can be manufactured.
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