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22 条记录 (耗时 0.012 秒)

    DEMODULATION FILTER
    1.
    发明授权
    DEMODULATION FILTER 有权
    解调

    公开(公告)号：EP1293036B1

    公开(公告)日：2008-10-22

    申请号：EP01936317.5

    申请日：2001-05-03

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco

    IPC分类号： H03F3/217

    CPC分类号： H03F3/217 ,  H03F3/2171 ,  H03F3/2173

    摘要： The invention describes an improvement of a demodulation filter for use in a push-pull amplifier. Known demodulation filters have the disadvantage that in the common mode they have a peaking and oscillating loop introducing great distortions. The demodulation filter according to the invention overcomes these disadvantages by introducing a common mode damping without influencing the differential mode.

    SILENT START
    3.
    发明授权
    SILENT START 有权
    噪声自由切换

    公开(公告)号：EP1293037B1

    公开(公告)日：2007-12-19

    申请号：EP01938155.7

    申请日：2001-05-03

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco

    IPC分类号： H03F3/217

    CPC分类号： H03F1/305 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/45475 ,  H03F2200/78 ,  H03F2203/45138

    摘要： The invention relates to a push-pull amplifier having a silent start circuit. To overcome the problem of noise during start up the amplifier of the invention comprises a silent start circuit, which decides the 'perfect' moment to start the power switches without the known start-up noise.

    PWM LIMITER
    6.
    发明授权
    PWM LIMITER 有权
    PWM BEGRENZUNGSANORDNUNG

    公开(公告)号：EP1293038B1

    公开(公告)日：2009-04-15

    申请号：EP01940395.5

    申请日：2001-05-03

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco

    IPC分类号： H03F3/217

    CPC分类号： H03F3/217

    摘要： The invention provides an improved push-pull amplifier with a pulse width modulator limiter for limiting the modulation depth. Herewith the disadvantages of the prior art are overcome wherein the high side output switch can be closed for a time period which results in distortions.

    WIRELESS POWER RECEIVER
    8.
    发明公开
    WIRELESS POWER RECEIVER 审中-公开
    DRAHTLOSERLEISTUNGSEMPFÄNGER

    公开(公告)号：EP3118963A1

    公开(公告)日：2017-01-18

    申请号：EP15176513.8

    申请日：2015-07-13

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco ,  BUTHKER, Henricus Cornelis Johannes ,  VAN LAMMEREN, Johannes Petrus Maria

    IPC分类号： H02J5/00

    CPC分类号： H02J50/12 ,  H02J5/005 ,  H02J7/025

    摘要： A wireless electrical power receiver (104) for inductively generating alternating current power in a wireless electrical power transfer system (100) having a transmission resonant frequency, the receiver (104) comprising a receiver resonator (112) having a receiver resonant frequency, the receiver resonator (112) constructed and arranged such that the receiver resonant frequency is detuned from the transmission resonant frequency.

    摘要翻译： 一种用于在具有传输谐振频率的无线电力传输系统（100）中感应地产生交流电力的无线电力接收器（104），所述接收器（104）包括具有接收器谐振频率的接收机谐振器（112），所述接收器 谐振器（112）构造和布置成使得接收器谐振频率与发送谐振频率失谐。

    PULSE WIDTH MODULATION CIRCUIT AND CLASS-D AMPLIFIER COMPRISING THE PWM CIRCUIT
    9.
    发明公开
    PULSE WIDTH MODULATION CIRCUIT AND CLASS-D AMPLIFIER COMPRISING THE PWM CIRCUIT 有权
    脉宽调制电路和D类放大器SO

    公开(公告)号：EP2162984A2

    公开(公告)日：2010-03-17

    申请号：EP08789150.3

    申请日：2008-06-19

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco ,  KRABBENBORG, Benno

    IPC分类号： H03F3/217 ,  H03F1/32 ,  H03K7/08 ,  G06G7/184 ,  H03F3/187

    CPC分类号： H03F3/2171 ,  H03F1/3205 ,  H03F3/187 ,  H03F2200/03 ,  H03F2200/264 ,  H03F2200/351 ,  H03K7/08

    摘要： Apulse width modulation (PWM) circuit comprises a first integrator (g m1) witha first feedback capacitor (C1), a second integrator (gm1) with a second feedback capacitor (C2) and a comparator (A0) having a first input (V1) connected to the output of the first integrator (gm1) and a second input (V2) connected to the output of the second integrator (gm2). A connection path comprising a resistor (R2) is established from the output of the first integrator (gm1) to an input of the second integrator (gm2). The first and second feedback capacitors (C1, C2) have capacities witha non-linear factor X(V) and a circuit with an inversely non-linear factor X-1(V) is arranged in the connection path between the output of the first integrator (gm1) and said input of the second integrator (gm2). The PWM circuit may formpath of a Class-D amplifier.

    POWER AMPLIFIER
    10.
    发明公开
    POWER AMPLIFIER 审中-公开
    功率放大器

    公开(公告)号：EP2087587A1

    公开(公告)日：2009-08-12

    申请号：EP07849075.2

    申请日：2007-10-18

    申请人： NXP B.V.

    发明人： BERKHOUT, Marco

    IPC分类号： H03F3/217 ,  H03K17/06 ,  H03K19/017 ,  H03K17/687

    CPC分类号： H03F3/2171 ,  H03F2200/351 ,  H03F2200/51 ,  H03K17/063 ,  H03K17/6871

    摘要： The invention refers to a power amplifier comprising a first transistor (MH) having a first main channel coupled between a positive power supply terminal (Vdd) and an output terminal (Vout), said first transistor having a control terminal driven by a first gate signal (Vgatehigh) provided by a high driver circuit, which is biased from a first voltage terminal (Vboot). The power amplifier further comprises a second transistor (ML) having a second main channel coupled between the output terminal and a negative power supply terminal (Vss), said second transistor having a second control terminal driven by a second gate signal (Vgatelow) provided by a low driver circuit, which is biased from a second voltage terminal (Vreg), and a switch circuit (10) coupled between the first voltage terminal (Vboot) and the second voltage terminal (Vreg), said switch circuit being controlled by the second gate Signal (Vgatelow).

    摘要翻译： 本发明涉及包括具有耦合在正电源端子（Vdd）和输出端子（Vout）之间的第一主通道的第一晶体管（MH）的功率放大器，所述第一晶体管具有由第一栅极信号 （Vgatehigh），其由高电平驱动电路提供，其从第一电压端子（Vboot）偏置。 功率放大器进一步包括具有耦合在输出端子和负电源端子（Vss）之间的第二主通道的第二晶体管（ML），所述第二晶体管具有由第二栅极信号（Vgatelow）驱动的第二控制端子，所述第二栅极信号由 从第二电压端子（Vreg）偏置的低驱动器电路以及耦合在第一电压端子（Vboot）和第二电压端子（Vreg）之间的开关电路（10），所述开关电路由第二电压端子 门信号（Vgatelow）。