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1.
公开(公告)号:EP4437738A1
公开(公告)日:2024-10-02
申请号:EP22813017.5
申请日:2022-10-20
发明人: WANG, Jing , LUO, Jiafu , MA, Silei , JIANG, Xiaoyun
IPC分类号: H04N25/585 , H04N23/741 , H04N25/13 , H04N25/445 , H04N25/59
CPC分类号: H04N23/741 , H04N25/134 , H04N25/445 , H04N25/46 , H04N25/585 , H04N25/59
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2.
公开(公告)号:EP4270979A1
公开(公告)日:2023-11-01
申请号:EP23170864.5
申请日:2023-04-28
发明人: TATSUTA, Kazuki , OKURA, Shunsuke , MIYAUCHI, Ken , OWADA, Hideki , HAN, Sangman , TAKAYANAGI, Isao
IPC分类号: H04N25/59 , H04N25/771
摘要: A solid-state imaging device (10, 10A to 10L), a method for driving a solid-state imaging device (10, 10A to 10L) and an electronic apparatus (300) are capable of reducing kTC noise of a LCG signal, preventing a drop in SNR at the conjunction point between a HCG signal and the LCG signal, and eventually achieving improved image quality. At a start of a reset period (PR1), first and second reset transistors (RST11-Tr, RST12-Tr) are switched into a conduction state. During a predetermined first period (PR11) after the reset period (PR1) starts, the first reset line (LRST1) is kept connected to a reset potential (Vdd). After the first period (PR11) elapses, the second reset transistor (RST12-Tr) is switched into a non-conduction state to switch the first reset line (LRST1) into a floating state, so that the first reset line (LRST1) has high impedance. After a second period (PR12) elapses and when the reset period (PR1) ends, the first reset transistor (RST11-Tr) is switched into the non-conduction state.
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公开(公告)号:EP4181521A1
公开(公告)日:2023-05-17
申请号:EP22206189.7
申请日:2022-11-08
发明人: JUNG, Yooseung , HONG, Seokyong , KIL, Junyoung
IPC分类号: H04N25/704 , H04N25/133 , H04N25/13 , H04N25/59 , H04N25/76
摘要: Provided is an image sensor and an operation method of the image sensor. The image sensor includes a pixel array including a plurality of white pixels, a plurality of color pixels, and a plurality of auto focus (AF) pixels, a first shared pixel including the plurality of white pixels and the plurality of color pixels includes a first conversion gain transistor and a second conversion gain transistor configured to control a conversion gain of the first shared pixel, and a second shared pixel including some of the plurality of white pixels and the plurality of color pixels and at least one AF pixel includes a third conversion gain transistor and a fourth conversion gain transistor configured to control a conversion gain of the second shared pixel. The first conversion gain transistor, the second conversion gain transistor, the third conversion gain transistor, and the fourth conversion gain transistor are connected to different conversion gain control lines, respectively.
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4.
公开(公告)号:EP4213492B1
公开(公告)日:2024-09-18
申请号:EP23152082.6
申请日:2023-01-17
IPC分类号: H04N25/46 , H04N25/59 , H04N25/771 , H04N25/79 , H04N25/778 , H04N25/772 , H04N25/702 , H04N25/704
CPC分类号: H04N25/46 , H04N25/59 , H04N25/702 , H04N25/704 , H04N25/771 , H04N25/772 , H04N25/778 , H04N25/79 , H04N25/78
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5.
公开(公告)号:EP4418676A1
公开(公告)日:2024-08-21
申请号:EP22880644.4
申请日:2022-08-23
发明人: ASAKURA, Luonghung , SAKATA, Minoru
IPC分类号: H04N25/77 , H04N25/59 , H04N25/771
CPC分类号: H04N25/771 , H04N25/59 , H04N25/77
摘要: To make miniaturization of pixels easier in a solid-state imaging element with an expanded dynamic range.
A conversion efficiency control transistor controls the conversion efficiency at the time of conversion of a charge into a voltage by opening and closing a path between a floating diffusion layer and an additional capacitance. An upstream amplification transistor amplifies the voltage generated from the charge with the conversion efficiency, and outputs the voltage to a node. A plurality of capacitive elements hold the output voltage. A selecting circuit connects any of the plurality of capacitive elements to a downstream node. A downstream circuit reads out and outputs the held voltage via the downstream node.-
公开(公告)号:EP4362487A1
公开(公告)日:2024-05-01
申请号:EP23204599.7
申请日:2023-10-19
发明人: SHIM, Eun Sub
IPC分类号: H04N25/40 , H04N25/583 , H04N25/59 , H04N25/704 , H04N25/778 , H04N25/78
CPC分类号: H04N25/583 , H04N25/40 , H04N25/59 , H04N25/78 , H04N25/778 , H04N25/704
摘要: An image sensor includes a first pixel group, a second pixel group arranged in at least one of the same column and row as the first pixel group, a first analog-to-digital converter and a second analog-to-digital converter, each of the first and second analog-to-digital converters being configured to process pixel signals output from the first pixel group and the second pixel group, and a switching circuit configured to selectively transmit a first pixel signal output from the first pixel group to the first analog-to-digital converter or the second analog-to-digital converter and to selectively transmit a second pixel signal output from the second pixel group to the first analog-to-digital converter or the second analog-to-digital converter. While the first analog-to-digital converter is connected to the first pixel group to process the first pixel signal, the second analog-to-digital converter is connected to the second pixel group to process the second pixel signal. Accordingly, AF information may be more effectively obtained.
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7.
公开(公告)号:EP4307705A1
公开(公告)日:2024-01-17
申请号:EP23184993.6
申请日:2023-07-12
发明人: MIYAUCHI, Ken , OWADA, Hideki , MORI, Kazuya , TAKAYANAGI, Isao
IPC分类号: H04N25/771 , H04N25/59 , H04N25/46
摘要: Provided are a solid-state imaging device (10, 10A to 10E), a method for driving a solid-state imaging device (10, 10A to 10E), and an electronic apparatus (300) that are capable of selecting a pixel operating mode between a RS mode and a GS mode and switching a conversion gain read-out mode, where signals produced with different conversion gains are read, among several options depending on a scene. As a result, the solid-state imaging device (10, 10A to 10E), the method for driving the solid-state imaging device (10, 10A to 10E) and the electronic apparatus (300) can minimize a drop in SNR at the conjunction point between a HCG signal and a LCG signal and also achieve high full well capacity and little dark noise.
In a solid-state imaging device (10, 10A to 10E), a pixel part (20) includes pixels (200, 200A to 200E) arranged in a matrix pattern, and each pixel (200, 200A to 200E) includes a photoelectric conversion reading part (210, 210A to 210E). The solid-state imaging device (10, 10A to 10E) is capable of performing rolling shutter (RS) and global shutter (GS) and configured to select an appropriate pixel operation mode from among the RS and GS. In addition, the solid-state imaging device (10, 10A to 10E) is configured to switch the conversion gain read-out mode, where the signals produced with different conversion gains are read, among several options depending on a scene.-
公开(公告)号:EP4062631B1
公开(公告)日:2024-08-21
申请号:EP20825332.8
申请日:2020-11-20
IPC分类号: H04N25/46 , H04N25/59 , H04N25/771 , H04N25/778
CPC分类号: H04N25/46 , H04N25/59 , H04N25/778 , H04N25/771 , H04N25/78
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公开(公告)号:EP4040777B1
公开(公告)日:2024-06-12
申请号:EP22152372.3
申请日:2022-01-20
IPC分类号: H04N25/59 , H04N25/771
CPC分类号: H04N25/59 , H04N25/771
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公开(公告)号:EP4307703A1
公开(公告)日:2024-01-17
申请号:EP23185498.5
申请日:2023-07-14
发明人: PARK, Seokyong , KIM, Kyungmin , KIM, Donghyun
IPC分类号: H04N25/585 , H04N25/59
摘要: An image sensor includes a pixel array including a first pixel connected to a first column line and a second pixel connected to a second column line, each of the first pixel and the second pixel including a first photodiode (PD) and a second PD, which share a driving transistor, are configured to operate in a first mode and a second mode according to a conversion gain based on the first PD, and are configured to operate in a third mode and a fourth mode based on the second PD; and an analog-to-digital converter including a first correlated double sampling (CDS) circuit, a second CDS circuit, and a third CDS circuit, which read pixel signals output through the first column line and the second column line. The first CDS circuit is connected to the first column line and the second column line in a time-division manner.
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