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公开(公告)号:EP3035667B1
公开(公告)日:2024-06-19
申请号:EP14835954.0
申请日:2014-08-07
IPC分类号: H01L27/146 , H04N23/63 , H04N25/13 , H04N25/44 , H04N25/50 , H04N25/533 , H04N25/583 , H04N25/70 , H04N25/77 , H04N25/79
CPC分类号: H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H04N23/632 , H04N25/44 , H04N25/50 , H04N25/533 , H04N25/583 , H04N25/79 , H04N25/70 , H04N25/77 , H04N25/134
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公开(公告)号:EP4340384A1
公开(公告)日:2024-03-20
申请号:EP23197190.4
申请日:2023-09-13
发明人: HAN, Runze
IPC分类号: H04N25/535 , H04N25/583 , H04N25/77 , H04N25/78 , H04N25/47
摘要: Provided are a signal readout circuit and a method therefor. In the signal readout circuit, a readout row selector is configured to gate a row of pixel units in a pixel array. A reset row selector is configured to gate first reset switches of the row of pixel units. Each pixel unit in the row in a pixel subarray included in the pixel array converts an optical signal into an electrical signal, and outputs the electrical signal to a connected pixel subarray readout feedback circuit. When it is determined based on the electrical signal that a signal generation condition is met, a reset signal is generated and sent to a first pixel unit, and an output signal is generated for output.
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公开(公告)号:EP4080880B1
公开(公告)日:2024-08-14
申请号:EP22179064.5
申请日:2018-11-12
IPC分类号: H04N25/13 , H01L27/146 , H04N25/42 , H04N25/46 , H04N25/533 , H04N25/58 , H04N25/704 , H04N25/583 , H04N25/585
CPC分类号: H01L27/14621 , H01L27/14609 , H01L27/14607 , H01L27/14625 , H01L27/14643 , H04N25/42 , H04N25/533 , H04N25/46 , H04N25/58 , H04N25/585 , H04N25/583 , H04N25/704 , H04N25/134
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公开(公告)号:EP4362487A1
公开(公告)日:2024-05-01
申请号:EP23204599.7
申请日:2023-10-19
发明人: SHIM, Eun Sub
IPC分类号: H04N25/40 , H04N25/583 , H04N25/59 , H04N25/704 , H04N25/778 , H04N25/78
CPC分类号: H04N25/583 , H04N25/40 , H04N25/59 , H04N25/78 , H04N25/778 , H04N25/704
摘要: An image sensor includes a first pixel group, a second pixel group arranged in at least one of the same column and row as the first pixel group, a first analog-to-digital converter and a second analog-to-digital converter, each of the first and second analog-to-digital converters being configured to process pixel signals output from the first pixel group and the second pixel group, and a switching circuit configured to selectively transmit a first pixel signal output from the first pixel group to the first analog-to-digital converter or the second analog-to-digital converter and to selectively transmit a second pixel signal output from the second pixel group to the first analog-to-digital converter or the second analog-to-digital converter. While the first analog-to-digital converter is connected to the first pixel group to process the first pixel signal, the second analog-to-digital converter is connected to the second pixel group to process the second pixel signal. Accordingly, AF information may be more effectively obtained.
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公开(公告)号:EP3804294B1
公开(公告)日:2023-08-30
申请号:EP19743083.8
申请日:2019-06-04
发明人: LI, Yuelong , MCELVAIN, Jon S. , TOFIGHI, Mohammad
IPC分类号: H04N23/84 , H04N5/14 , H04N25/46 , H04N25/53 , H04N25/533 , H04N25/583
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公开(公告)号:EP4199530A1
公开(公告)日:2023-06-21
申请号:EP23156683.7
申请日:2018-11-12
发明人: HOSHINO, Kozo
IPC分类号: H04N25/13 , H01L27/146 , H04N25/42 , H04N25/46 , H04N25/533 , H04N25/58 , H04N25/704 , H04N25/583 , H04N25/585
摘要: The present technology relates to a solid-state imaging device and an electronic apparatus that enable simultaneous acquisition of a signal for generating a high dynamic range image and a signal for detecting a phase difference.
The solid-state imaging device includes a plurality of pixel sets each including color filters of the same color, for a plurality of colors, each pixel set including a plurality of pixels. Each pixel includes a plurality of photodiodes PD. The present technology can be applied, for example, to a solid-state imaging device that generates a high dynamic range image and detects a phase difference, and the like.-
公开(公告)号:EP3953896B1
公开(公告)日:2024-08-28
申请号:EP20722182.1
申请日:2020-04-09
IPC分类号: G06T5/50 , G06T5/20 , G06T5/70 , H04N23/741 , H04N23/81 , H04N25/13 , H04N25/583 , H04N23/84
CPC分类号: G06T5/50 , G06T5/20 , G06T2207/2020820130101 , G06T2207/1014420130101 , H04N23/81 , H04N23/741 , H04N25/583 , H04N23/84 , H04N25/134 , G06T5/70
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公开(公告)号:EP3843379B1
公开(公告)日:2024-08-07
申请号:EP19882935.0
申请日:2019-09-09
IPC分类号: H04N23/73 , H04N23/741 , H04N23/667 , H04N23/90 , H04N23/45 , H04N25/583 , G01B11/02 , G06V10/25 , G06V20/56
CPC分类号: G01B11/026 , G06V20/56 , G06V10/25 , H04N23/45 , H04N23/667 , H04N23/73 , H04N23/741 , H04N25/583 , H04N23/90
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公开(公告)号:EP4254977A1
公开(公告)日:2023-10-04
申请号:EP23705465.5
申请日:2023-01-20
发明人: KIM, Yunjeong , PARK, Jaehyoung , KANG, Kawang , KIM, Dongsoo , MOON, Inah , SHIMOKAWA, Shuichi , YOUN, Yeotak , KWON, Suhyog , SON, Youngbae , WON, Jonghoon
IPC分类号: H04N25/704 , H04N25/59 , H04N25/583 , H04N25/75 , H04N25/11 , H04N23/67 , H01L27/146 , H04N25/42
摘要: According to an embodiment, an electronic device may include an image sensor including a plurality of unit pixels, and at least one processor electrically connected with the image sensor. Each unit pixel may include PDs disposed under a micro lens and having a 2x2 arrangement, that is, a TL, a TR, a BL, and a BR. The at least one processor may acquire a first image frame from the image sensor, determine an operation mode of the image sensor based on the first image frame, and may perform AF of an H direction by using TL, BL, or TL+BL AF data and TR, BR, or TR+BR AF data, or may perform AF of a V direction by using TL, TR, or TL+TR AF data and BL, BR, or BL+BR AF data according to an operation mode of the image sensor. Various other embodiments understood through the specification are possible.
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公开(公告)号:EP4187914A1
公开(公告)日:2023-05-31
申请号:EP22209442.7
申请日:2022-11-24
发明人: KIM, Jiyong , LEE, Kwanghyun , JUNG, Jaejin , CHOI, Wontak , HA, Yeeun
IPC分类号: H04N25/11 , H04N23/67 , H04N25/704 , H01L27/146 , H04N25/79 , H04N25/13 , H04N25/40 , H04N25/46 , H04N25/583 , H04N25/585
摘要: An image sensor, including a pixel array including a first unit pixel including first a plurality of photodiodes and a second unit pixel including a second plurality of diodes; a readout circuit configured to: obtain a reset signal from the first unit pixel and the second unit pixel, obtain a first single pixel signal from a first photodiode of the first unit pixel, and a second single pixel signal from a second photodiode of the second unit pixel, and obtain a first summed pixel signal from the first unit pixel, and a second summed pixel signal from the second unit pixel, wherein the first photodiode is disposed in position with respect to the first unit pixel which is different from a position of the second photodiode with respect to the second unit pixel.
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