SYNCHRONOUS MODULATION SYSTEM USING AMPLITUDE MODULATION

    公开(公告)号:EP3852269A1

    公开(公告)日:2021-07-21

    申请号:EP19859361.8

    申请日:2019-09-12

    IPC分类号: H03C1/00 H03D1/00

    摘要: The invention relates to a synchronous modulation system using amplitude modulation, which basically consists of a modulator and a demodulator able to transmit digital signals at double the frequency of its carrier wave. For this purpose, the system uses analog and digital circuits that combine to modulate, separately, the positive half and the negative half of the carrier sine wave, such that in a single cycle of the carrier wave, two different information bits can be sent. The demodulator-modulator unit can be easily combined with other units to form wired or wireless communication systems and even optical or sonic systems with minimal generation of parasitic harmonics, resulting in a minimum bandwidth requirement for operation.

    PHASE ACCUMULATOR GENERATING REFERENCE PHASE FOR PHASE COHERENT DIRECT DIGITAL SYNTHESIS OUTPUTS
    4.
    发明公开
    PHASE ACCUMULATOR GENERATING REFERENCE PHASE FOR PHASE COHERENT DIRECT DIGITAL SYNTHESIS OUTPUTS 审中-公开
    相位累加器用于产生参考相位相位相干直接数字合成问题

    公开(公告)号:EP2537248A1

    公开(公告)日:2012-12-26

    申请号:EP11742773.2

    申请日:2011-02-10

    IPC分类号: H03C1/00

    CPC分类号: G06F1/0335 G06F2211/902

    摘要: A phase accumulator generates phase data for a direct digital synthesis (DDS) device based on a reference phase to provide analog sinusoidal outputs that are locked to the reference phase and thus phase coherent. The frequency of a sinusoidal DDS output may be controlled by changing a frequency control word (FCW) provided to the phase accumulator without affecting the incrementing reference phase. The sinusoidal DDS output is based on a multiple of the FCW and the reference phase and thus remains locked to the reference phase, providing phase coherency even when the FCW changes to change the frequency.

    VERFAHREN UND VORRICHTUNG ZUR ERZEUGUNG EINES AMPLITUDEN-MODULIERTEN SIGNALS
    5.
    发明公开
    VERFAHREN UND VORRICHTUNG ZUR ERZEUGUNG EINES AMPLITUDEN-MODULIERTEN SIGNALS 有权
    方法和装置产生被调制的信号幅度

    公开(公告)号:EP2171838A2

    公开(公告)日:2010-04-07

    申请号:EP08773534.6

    申请日:2008-06-19

    IPC分类号: H03C1/00

    CPC分类号: H03C1/06 H03C1/02 H03K7/02

    摘要: An improved method for producing an amplitude-modulated signal and an associated device are characterized substantially by the following characteristics, or an improved device for producing an amplitude-modulated signal comprises the following characteristics: the useful or information signal (101) is produced from a digitized useful or information signal (101), which is converted into an analog useful or information signal (1). A corrected analog useful or information signal (1k') is used for the useful or information signal (1) instead of a desired signal (1'), the corrected signal compared to the desired signal (1') being changed such that upper harmonics, which when using the desired signal (1') are outside the useful band (3) above the limit value for the signal size of the modulated carrier signal, when using the corrected useful or information signal (1k') are within the permitted range below the limit value for the signal size of the modulated carrier signal.

    Oscillator using a phase detector and phase shifter
    6.
    发明公开
    Oscillator using a phase detector and phase shifter 有权
    Oszillator unter Verwendung eines Phasendetektors und Phasenschiebers

    公开(公告)号:EP1811648A2

    公开(公告)日:2007-07-25

    申请号:EP07090076.6

    申请日:2000-05-26

    IPC分类号: H03C1/00

    摘要: A controlled oscillator circuit comprising a ring oscillator with a plurality of oscillator stages (41, 45) is disclosed, each of said plurality of oscillator stages (41, 45) receiving an input signal and a feedback signal, wherein a phase differential between the input signal and the feedback signal is approximately 90 degrees at each of said plurality of oscillator stages (41, 45).

    摘要翻译: 公开了一种包括具有多个振荡器级(41,45)的环形振荡器的受控振荡器电路,所述多个振荡器级(41,45)中的每一个接收输入信号和反馈信号,其中输入 信号,并且在所述多个振荡器级(41,45)中的每一个处,反馈信号约为90度。

    Device and method for selectively demodulating ir codes
    8.
    发明公开
    Device and method for selectively demodulating ir codes 审中-公开
    Vorrichtung zum Demodulieren von IR-Koden und Verfahren dazu

    公开(公告)号:EP1389830A1

    公开(公告)日:2004-02-18

    申请号:EP03017803.2

    申请日:2003-08-05

    IPC分类号: H03C1/00

    CPC分类号: H03C1/02 H04B10/502

    摘要: A device and method for emitting amplitude-modulated signals, which are fed to an emitting member from a signal source via a driver stage, said amplitude-modulated signals containing a higher frequency carrier and a lower frequency useful signal modulated onto said carrier, said device comprises amplifying means for amplifying the level of the signals received from the signal source to a predetermined level. The device further comprises integrating means for performing integration on the amplified signals so as to remove the higher frequency carrier and signal regenerating means for regenerating the useful signal from the integrated signals and providing the useful signal to said driver stage and emitting member for emission. The high frequency carrier can be removed effectively from the modulated IR signals from the signal source.

    摘要翻译: 一种用于发射幅度调制信号的装置和方法,其经由驱动级从信号源馈送到发射构件,所述幅度调制信号包含调制到所述载波上的较高频率载波和较低频率有用信号,所述装置 包括用于将从信号源接收的信号的电平放大到预定电平的放大装置。 该装置还包括用于对放大的信号进行积分以便去除较高频率载波和信号再生装置的积分装置,用于从积分信号再生有用信号,并将有用信号提供给所述驱动级和用于发射的发射构件。 可以从信号源的调制IR信号中有效地去除高频载波。

    SCHALTUNGSANORDNUNG ZUR DIREKTMODULATION
    9.
    发明公开
    SCHALTUNGSANORDNUNG ZUR DIREKTMODULATION 有权
    电路是否直接调制

    公开(公告)号:EP1258077A2

    公开(公告)日:2002-11-20

    申请号:EP00993359.9

    申请日:2000-11-29

    发明人: VEIT, Werner

    IPC分类号: H03C1/00

    CPC分类号: H03D7/166

    摘要: The invention relates to a circuit configuration for direct modulation that comprises an oscillator (1) whose output signal is split into quadrature components (LOI, LOQ) for modulation with the useful signal. A circuit (10) used for frequency shifting renders the output frequency and the frequency of the oscillator (1) to be fractional rational multiples of one another. Said circuit (10) comprises a phase shifter (11) that generates first additional quadrature components (S1I, S1Q) and a divider (12) that generates second additional quadrature components (S2I, S2Q). The quadrature components (S1I, S2I; S1Q, S2Q) are mixed with one another (13, 14). The frequency shift results in the oscillation frequency of the oscillator (1) to be shifted towards outside the useful frequency band. Remodulation effects do not influence the adjacent channels. The inventive circuit can be produced in a simple and inexpensive manner, particularly, it requires only one oscillator (1).

    Schaltungsanordnung
    10.
    发明公开
    Schaltungsanordnung 有权
    Oszillatorschaltungsanordnung

    公开(公告)号:EP0902532A1

    公开(公告)日:1999-03-17

    申请号:EP98115904.9

    申请日:1998-08-24

    发明人: Fenk, Josef

    IPC分类号: H03D1/22 H03D7/16 H03C1/00

    CPC分类号: H03D7/165 H03C1/00 H03D1/2245

    摘要: Um zu vermeiden, daß eine parasitäre Rückkopplung in einem Sender, einem Modulator oder einem Demodulator einen störenden Einfluß auf den die Mischfrequenz erzeugenden Schaltungsanteil ausübt, weist die erfindungsgemäße Schaltung einen Hauptoszillator (HVCO) und einen diesem nachgeschalteten untergeordneten Oszillator (SVCO) auf. Der Hauptoszillator (HVCO) erzeugt ein Signal mit einer x-ten Oberschwingung, die zum Anregen des untergeordneten Oszillators (SVCO) dient. Weiterhin ist ein Frequenzteiler (FT) vorgesehen, der dem untergeordneten Oszillator (SVCO) nachgeordnet ist und die Frequenz des Ausgangssignals des untergeordneten Oszillators (SVCO) durch einen ganzzahligen Teilerwert teilt, wobei der Teilerwert vom Wert x abweicht.

    摘要翻译: 电路装置包括连接到主振荡器的主振荡器(HVCO)和从属振荡器(SVCO)。 主振荡器产生用于激发下级振荡器的具有x次谐波振荡的信号。 分频器与下级振荡器连接,并将下位振荡器的输出信号(Sout)的频率(fVCO)除以偏离值x的整数除法值(n)。 优选地提供反馈回路,其将从属振荡器的输出信号与参考信号进行比较,并且向下级振荡器提供相应的控制信号。