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公开(公告)号：JPH06120743A
公开(公告)日：1994-04-28
申请号：JP19225993
申请日：1993-08-03
申请人： FUJITSU LTD
发明人： IKEUCHI AKIRA , MORI KAZUYUKI , FUJIMOTO NOBUHIRO
IPC分类号： H03F1/02 , H03F1/22 , H03F1/42 , H03F3/08 , H04B10/07 , H04B10/40 , H04B10/50 , H04B10/516 , H04B10/564 , H04B10/58 , H04B10/60 , H04B10/69 , H04B10/04 , H04B10/06
摘要： PURPOSE:To obtain a pre-amplifier in which a dynamic range can be enlarged by a large output amplitude, and a light receiver in which a circuit constitution is simple, eye opening is sufficient, and a parallel transmission can be appropriately attained, in a light receiving pre-amplifier and a light receiver. CONSTITUTION:This device is equipped with an input FET 10 whose gate terminal 10a to which a current signal from a light receiving element is inputted, and an output FET 12 whose gate terminal 12a is connected with the signal terminal 10b of the input FET 10, which amplifies the current signal into a prescribed voltage signal, and outputs it. And also, a feedback resistance 14 is interposed between the gate terminal 10a of the input FET 10 and the output terminal 19 of the output FET 12, and a constant current source 15 which increases the change of the amplitude value of the output potential of the output FET 12 corresponding to the change of an optical signal is interposed between the gate terminal 10a of the input FET 10 and a power source 17.
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公开(公告)号：JPH06112737A
公开(公告)日：1994-04-22
申请号：JP28240292
申请日：1992-09-28
申请人： NEC CORP
发明人： SUGANO KAZUHIRO
摘要： PURPOSE:To increase the through rate while keeping the fixed stability (phase margin) of an operational amplifier. CONSTITUTION:Input terminals 1 and 2 are connected to two input terminals of an operational amplifier, and an output terminal 3 is connected to a position parallel to the bias current source of the first stage of the operational amplifier Differential pairs T1 and T2 consisting of transistors TR Q1 and Q2, a diode D1, the TRs Q3 and Q4, and a diode D2 supply currents to a first stage of the operational amplifier only when a differential input signal voltage of the operational amplifier exceeds a certain threshold level (about 0.5V). Then the phase compensation capacity is quickly charged and the through rate is increased.
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公开(公告)号：JPH0685550A
公开(公告)日：1994-03-25
申请号：JP23447992
申请日：1992-09-02
申请人： HITACHI LTD
发明人： KAWADA ATSUMI , TANAKA HIRONORI
IPC分类号： H03F1/42
摘要： PURPOSE:To provide the transistor circuit high in band property and high in amplification factor. CONSTITUTION:The base electrode of a transistor Q1 to receive a signal photoelectrically converted by a photodiode is connected to a bias VB 1 through a resistor RB, and the emitter electrode of the Q1 is connected to the base electrode of a Q2 through resistors R1 and C1 and connected to a bias VB 2 through a resistor R2. The collector electrode of the Q2 is connected to a power source VCC through a resistor RL, an amplified signal is extracted from the collector electrode of the Q2, the signal is inputted to an emitter follower composed of a transistor QE and a resistor RE, and an output signal is provided from the emitter of the QE.
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公开(公告)号：JPH0613871A
公开(公告)日：1994-01-21
申请号：JP9479793
申请日：1993-03-15
申请人： SUZUKI TOSHIYASU
发明人： SUZUKI TOSHIYASU
IPC分类号： H02M1/08 , H03F1/08 , H03F1/42 , H03K17/61 , H03K17/687 , H03K17/691
摘要： PURPOSE:To make a charging or discharging current flow through a resistor and a leakage inductance and to reduce effects on driving by connecting capacitance between a control terminal and a main terminal through a potential device for which the both inductances are combined. CONSTITUTION:When a transistor TR2 is turned OFF or when a collector voltage is raised by an amplifying operation or the like, the charging current of the capacitance Ccb between the collector and a base is reduced equivalently from DC power supply 1 by not only a load 4 but also the internal resistor of the potential device 3 and the both leakage inductances, etc. On the other hand, when the TR 2 is turned ON or when the collector voltage is lowered by the amplifying operation or the like, the both sides of the DC power supply 1 can be considered as short-circuited from the AC point of view and the discharging current of the capacitance Ccb between the collector and the base is reduced by not only the load 4 but also the internal resistor of the potential device 3 and the both leakage inductances, etc. That is, it is reduced that the capacitance Ccb interferes the driving of the TR2.
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公开(公告)号：JPH05251962A
公开(公告)日：1993-09-28
申请号：JP5030392
申请日：1992-03-09
发明人： ITO YASUYUKI , MOCHIZUKI MITSURU , TAKAGI SUNAO
摘要： PURPOSE:To improve reflecting characteristic and band characteristic of the amplifier. CONSTITUTION:The amplifier is provided with an input terminal 1, an output terminal 2, a 1st transmission line 4 connecting to the input terminal 1, a 2nd transmission line 5 connecting to the output terminal 2, a common source field- effect transistor 3 or a common emitter transistor(TR) whose drain terminal or collector terminal connects to the 2nd transmission line 5, and field-effect transistors 16, 17 whose gate bias is variable or a TR whose base bias is variable connecting to ground via capacitor elements 16, 17 provided to a 1st terminal 20 of the 1st transmission line opposite to the input terminal 1 or to a 2nd terminal 21 of the 2nd transmission line opposite to the output terminal 2.
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公开(公告)号：JPH0566770B2
公开(公告)日：1993-09-22
申请号：JP22511784
申请日：1984-10-27
发明人： NANBU SHUTARO , NISHIUMA MASAHIRO
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公开(公告)号：JPH05243861A
公开(公告)日：1993-09-21
申请号：JP7884192
申请日：1992-02-29
申请人： SONY CORP
发明人： NISHIYAMA SEIICHI
摘要： PURPOSE:To effectively avoid deterioration of a frequency characteristic caused by a phase shift by constituting the circuit so that phases of a first or a second differential output and an inversion output signal or a same phase output signal inputted to a single end push-pull output stage become an opposite in phase relation to each other. CONSTITUTION:A Gilbert amplifier 11 outputs the same phase output signal V3 and an inversion output signal V4 subjected to gain G multiple obtained by an expression I with respect to an input signal Vin, to a push-pull output stage 12. The output stage 12 is cascade-connected to a differential pair of transistors(TR) Q13, Q14, and constituted of NPN TRs Q15, Q16 for constituting the differential pair 15 and an NPN TR 17 cascaded to the TR Q15. To the TR Q15 and Q17, an idling current Iout is given from a current source 18, and they are push-pull-driven by the inversion output signal V1 and the same phase output signal V3 whose phases are opposite to each other. That is, the TR Q15 drives the load capacity C attached to the output stage by a voltage output, and an the other hand, the TR Q17 drives the load capacity C by a current output whose phase is opposite to the signal V1. Accordingly, deterioration of a phase shift frequency characteristic is avoided.
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