公开(公告)号：JP3591524B2

公开(公告)日：2004-11-24

申请号：JP2002151864

申请日：2002-05-27

Applicant: 日本電気株式会社

Inventor： 直典 下戸 ,  克 菊池 ,  和宏 馬場

IPC: H01L23/12 ,  H01L23/13 ,  H01L23/14 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/13 ,  H01L23/16 ,  H01L23/3121 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041

Abstract: A semiconductor device mounting board in which high density packaging and fining can be realized in response to smaller pitches while ensuring excellent reliability of package by improving a conventional wiring board, its producing method and inspecting method, and a semiconductor package. The semiconductor device mounting board in characterized by comprising a wiring structure film consisting of an insulation layer and a wiring layer, a first electrode pattern provided on one surface of the wiring structure film such that at least the side circumference thereof touches the insulation layer but at least the lower surface thereof does not touch the insulation layer and the surface of the insulation layer provided with the first electrode pattern is coplanar with the lower surface of the first electrode pattern, a second electrode pattern formed on the surface opposite to the first electrode pattern, an insulator film provided with an opening pattern being confined in the first electrode pattern, and a metal support provided on the surface of the insulator film.

公开(公告)号：JP3546961B2

公开(公告)日：2004-07-28

申请号：JP2001265802

申请日：2001-09-03

Applicant: 日本電気株式会社

Inventor： 直典 下戸 ,  孝二 松井 ,  克 菊池 ,  和宏 馬場

IPC: H01L23/12

CPC classification number: H01L2224/16 ,  H01L2924/01078