公开(公告)号：JP4274649B2

公开(公告)日：2009-06-10

申请号：JP28705799

申请日：1999-10-07

Applicant: 株式会社日立製作所

Inventor： 修 小室 ,  文夫 水野 ,  二大 笹嶋

IPC: H01L21/027 ,  H01L21/66 ,  B32B3/00 ,  G01B11/00 ,  G01N23/225 ,  G01Q30/02 ,  G01Q30/04 ,  G03F7/20

CPC classification number: G03F7/70608 ,  G01N23/225 ,  G06T7/0004 ,  H01J37/265 ,  H01J37/28 ,  H01J2237/221 ,  H01J2237/24592 ,  H01J2237/2487

Abstract: The edges of the reticle are detected with respect to the microstructured patterns exposed by the stepper, and the shapes of the microstructured patterns at the surface and at the bottom of the photoresist are detected. The microstructured patterns are evaluated by calculating, and displaying on the screen, the dislocation vector that represents the relationship in position between the detected patterns on the surface and at the bottom of the photoresist. Furthermore, dislocation vectors between the microstructured patterns at multiple positions in a single-chip or single-shot area or on one wafer are likewise calculated, then the sizes and distribution status of the dislocation vectors at each such position are categorized as characteristic quantities, and the corresponding tendencies are analyzed. Thus, stepper or wafer abnormality is detected.

公开(公告)号：JP5497368B2

公开(公告)日：2014-05-21

申请号：JP2009187259

申请日：2009-08-12

Applicant: 株式会社日立製作所

Inventor： 二大 笹嶋 ,  修 小室 ,  文夫 水野

IPC: H01L21/66 ,  G01N23/225

Abstract: PROBLEM TO BE SOLVED: To provide a method for performing evaluation and abnormality detection of a fine pattern formed on a semiconductor wafer and an aligner which exposes the pattern. SOLUTION: In a method and equipment for evaluating a pattern, which evaluate a hole pattern, on the basis of electrons detected by electron beam scanning to the hole pattern formed on a substrate, a ratio of the major axis to the minor axis of the hole pattern is obtained on the basis of the detected electrons. Features, ellipticity or the area of the circular shape of the hole pattern is obtained, on the basis of the detected electrons, and information on the characteristics, the ellipticity or the area of the circular shape is displayed for every chip on the substrate or by each shot of a projection aligner. COPYRIGHT: (C)2010,JPO&INPIT

公开(公告)号：JP4834478B2

公开(公告)日：2011-12-14

申请号：JP2006189759

申请日：2006-07-10

Applicant: 株式会社日立製作所

Inventor： 修 小室 ,  文夫 水野 ,  二大 笹嶋

IPC: H01L21/66 ,  G01B15/04 ,  H01L21/027

公开(公告)号：JP4343929B2

公开(公告)日：2009-10-14

申请号：JP2006189753

申请日：2006-07-10

Applicant: 株式会社日立製作所

Inventor： 修 小室 ,  文夫 水野 ,  二大 笹嶋

IPC: H01L21/027 ,  G01B11/24 ,  G01B15/04 ,  H01L21/66