公开(公告)号：JP2008304464A

公开(公告)日：2008-12-18

申请号：JP2008150970

申请日：2008-06-09

Applicant: Tektronix Inc ,  テクトロニクス・インコーポレイテッドTektronix,Inc.

Inventor： TRAN QUE THUY ,  KELLY DAVID L ,  HITE DAVID G ,  SMITH PATRICK A ,  LENIHAN THOMAS F

IPC: G01R13/20

CPC classification number: G01R13/0254 ,  G01R13/029

Abstract: PROBLEM TO BE SOLVED: To provide a serial trigger circuit which does not need an expensive precision high-power circuit, design accuracy, high costs, and complicated software.
SOLUTION: The position lock trigger apparatus employs oscilloscope circuitry and accompanying control software to provide to a user a capability to trigger an oscilloscope on a selected bit position in a received serial bit stream having a fixed pattern length, using either a synchronized, recovered, or external clock source. The selected trigger position can be moved forward or backward along the serial bit stream by one or more serial bit positions at a time in order to examine the entirety of the fixed pattern length serial bit stream, with or without regard to actual bit sequences occurring in the serial stream.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供不需要昂贵的高精度大功率电路的串行触发电路，设计精度高，成本高，而且复杂的软件。 位置锁定触发装置使用示波器电路和伴随的控制软件向用户提供在具有固定模式长度的接收串行比特流中的所选位位置上触发示波器的能力，使用同步的， 恢复或外部时钟源。 所选择的触发位置可以沿着串行比特流一次一个或多个串行比特位置向前或向后移动，以便检查固定模式长度串行比特流的整体，无论是否与实际的比特序列出现在 串行流。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2011128160A

公开(公告)日：2011-06-30

申请号：JP2010283603

申请日：2010-12-20

Applicant: Tektronix Inc ,  テクトロニクス・インコーポレイテッドTektronix,Inc.

Inventor： TRAN QUE THUY

IPC: G01R13/20 ,  G01R13/28

CPC classification number: G01R31/31716 ,  H04L12/40013

Abstract: PROBLEM TO BE SOLVED: To provide a circuit for masking blanking primitive.
SOLUTION: A blanking primitive masking circuit includes a detection and handling circuit 206 that receives data containing blanking primitives. The detection and handling circuit 206 generates a dynamic blanking signal when blanking primitives are detected. A comparator 210 receives reference data 256 from the memory 208, the delayed data 222, and the dynamic blanking signal 260. The comparator 210 compares the reference data 256 with the delayed data 222, and generates bit error output signals from mismatched reference data 256 bits and delayed data 222 bits when the dynamic blanking signal from the detection and handling circuit 206 is absent. The bit error output signals are not generated when the blanking primitive is in the delay data 222 and the dynamic blanking signal is present.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供用于掩蔽消隐原语的电路。 消隐原语屏蔽电路包括检测和处理电路206，其接收包含消隐原语的数据。 当检测到消隐原语时，检测和处理电路206产生动态消隐信号。 比较器210从存储器208接收参考数据256，延迟数据222和动态消隐信号260.比较器210将参考数据256与延迟数据222进行比较，并从不匹配的参考数据256位产生位错误输出信号 并且当来自检测和处理电路206的动态消隐信号不存在时延迟数据222位。 当消隐原语在延迟数据222中并且存在动态消隐信号时，不产生位错误输出信号。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009109488A

公开(公告)日：2009-05-21

申请号：JP2008260111

申请日：2008-10-06

Applicant: Tektronix Inc ,  テクトロニクス・インコーポレイテッドTektronix,Inc.

Inventor： HAZZARD SHANE A ,  TRAN QUE THUY ,  KLINGMAN KAYLA R ,  KELLY DAVID L ,  SMITH PATRICK A ,  KNIERIM DANIEL G

IPC: G01R13/28

CPC classification number: H03M9/00 ,  H04J3/076 ,  H04L25/14 ,  H04L25/4908

Abstract: PROBLEM TO BE SOLVED: To improve the performance and flexibility of serial data analysis.
SOLUTION: In a transmitter section 10, a demultiplexer 12 inputs serial data and outputs n×N data lanes, an encoder 14 inputs these data lanes and generates m×N encoded data lanes, a circuit 16 inserts additional data into these encoded data lanes and generates m×N stuffed data lanes, and a multiplexer 18 inputs these stuffed data lanes and outputs N serial data lanes at a desired data rate. A receiver section 20 inputs N serial data lanes and outputs a trigger event for serial data.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提高串行数据分析的性能和灵活性。 解决方案：在发射机部分10中，解复用器12输入串行数据并输出n×N个数据通道，编码器14输入这些数据通道并生成m×N个编码数据通道，电路16将附加数据插入到这些编码的 数据通道并产生m×N填充数据通道，并且多路复用器18输入这些填充的数据通道，并以期望的数据速率输出N个串行数据通道。 接收器部分20输入N个串行数据通道并输出用于串行数据的触发事件。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2014041120A

公开(公告)日：2014-03-06

申请号：JP2013158712

申请日：2013-07-31

Applicant: Tektronix Inc ,  テクトロニクス・インコーポレイテッドTektronix,Inc.

Inventor： TRAN QUE THUY

IPC: G01R31/319 ,  G01R13/20 ,  G01R13/28 ,  H04L7/08 ,  H04L25/02

CPC classification number: G01R31/31917 ,  G01R31/3171

Abstract: PROBLEM TO BE SOLVED: To provide a method, a device, and a system for automatically identifying a synchronous sub-pattern related to a test pattern.SOLUTION: A test measuring apparatus is triggered in response to a first instance of a trigger pattern in a data stream. A trigger-to-trigger counter 525 starts counting with a first trigger event. The test measuring apparatus is triggered again in response to a second instance of the trigger pattern in the data stream, and the counter finishes counting. A count value is compared with a predetermined length of a test pattern and when both are equal to each other, the trigger pattern is automatically determined to be a unique synchronous sub-pattern related to the test pattern.

Abstract translation: 要解决的问题：提供一种用于自动识别与测试图案相关的同步子模式的方法，装置和系统。解决方案：响应于触发模式的第一实例来触发测试测量装置 数据流。 触发触发计数器525用第一触发事件开始计数。 响应于数据流中的触发模式的第二个实例，再次触发测试测量装置，并且计数器完成计数。 将计数值与测试模式的预定长度进行比较，并且当两者彼此相等时，触发模式被自动确定为与测试模式相关的唯一同步子模式。

公开(公告)号：JP2011039047A

公开(公告)日：2011-02-24

申请号：JP2010170896

申请日：2010-07-29

Applicant: Tektronix Inc ,  テクトロニクス・インコーポレイテッドTektronix,Inc.

Inventor： TRAN QUE THUY

IPC: G01R13/28 ,  G01R13/20 ,  H04L25/02

CPC classification number: H04L1/242 ,  G01R31/3171 ,  H04L1/0061

Abstract: PROBLEM TO BE SOLVED: To provide a test measurement instrument capable of detecting a bit error.
SOLUTION: An input means 12 receives an input signal and outputs digitized data 14. A memory 18 accumulates digitized reference data containing a reference sequence. A pattern detector 16 detects the reference sequence from the digitized data 14 and generates a synchronization signal 20 correspondingly. The memory 18 outputs digitized reference data 22 in response to the synchronization signal by control of a memory controller 19. A comparator 24 compares the digitized reference data 22 from the memory with the digitized data 14.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供能够检测位错误的测试测量仪器。 解决方案：输入装置12接收输入信号并输出​​数字化数据14.存储器18累积包含参考序列的数字化参考数据。 模式检测器16从数字化数据14检测参考序列，并相应产生同步信号20。 存储器18通过存储器控制器19的控制来响应于同步信号输出数字化参考数据22.比较器24将来自存储器的数字化参考数据22与数字化数据14进行比较。版权所有（C）2011， JPO＆INPIT