公开(公告)号：US4464716A

公开(公告)日：1984-08-07

申请号：US266428

申请日：1981-05-22

申请人： Charles J. Young

发明人： Charles J. Young

IPC分类号： G06F7/57 ,  G06F7/74 ,  G06F9/44 ,  G06F7/48

CPC分类号： G06F7/74 ,  G06F7/57 ,  G06F9/4428

摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

摘要翻译： 具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并向用户提供灵活的简化界面，保护用户不受任何用户的影响。 该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。 通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。 寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。 地址与系统物理配置无关。 信息被识别为细粒度级别和信息类型和格式。 保护机制提供与个体信息相关联的可变访问权限。 用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。 操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

公开(公告)号：US4208722A

公开(公告)日：1980-06-17

申请号：US871616

申请日：1978-01-23

申请人： Edward J. Rasala ,  Charles J. Young

发明人： Edward J. Rasala ,  Charles J. Young

IPC分类号： G06F7/00 ,  G06F7/52 ,  G06F7/57 ,  G06F7/76

CPC分类号： G06F7/5336 ,  G06F7/483 ,  G06F2207/3844 ,  G06F2207/3884

摘要： A digital data multiplier, particularly useful in floating point processing systems, wherein a first digital word representing a first value is multiplied by successive groups of bits of a second digital word representing a second value to form successive partial products which are combined to form successive partial sums, the final sum of all such combined partial sums producing a digital word representing the final product of the first and second values.

摘要翻译： 一种在浮点处理系统中特别有用的数字数字乘法器，其中表示第一值的第一数字字乘以表示第二值的第二数字字的连续的位组，以形成连续的部分乘积，以形成连续的部分乘积 总和，所有这样的组合部分和的最终总和产生代表第一和第二值的最终产物的数字字。

公开(公告)号：US4493025A

公开(公告)日：1985-01-08

申请号：US266412

申请日：1981-05-22

申请人： Brett L. Bachman ,  James T. Nealon ,  Charles J. Young

发明人： Brett L. Bachman ,  James T. Nealon ,  Charles J. Young

IPC分类号： G06F9/318 ,  G06F9/34 ,  G06F13/00

CPC分类号： G06F9/30192 ,  G06F9/34

摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and includes length field information specifying the number of data bits at the addressed location. In accordance with the invention as used in such system, the processor includes arithmetic logic (ALU) means for performing operations on operands. The number of bits in the results of such operations are compared with the number of bits specified by the length field of an address of the location to which the result can be transferred to indicate when such numbers of bits are not equal.

摘要翻译： 具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并向用户提供灵活的简化界面，保护用户不受任何用户的影响。 寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。 地址独立于系统物理配置，并且包括指定寻址位置处的数据位数的长度字段信息。 根据在这种系统中使用的本发明，处理器包括用于对操作数执行操作的算术逻辑（ALU）装置。 将这些操作的结果中的比特数与由结果可以被传送到的位置的地址的长度字段指定的比特数进行比较，以指示何时这些比特数不相等。

公开(公告)号：US4493024A

公开(公告)日：1985-01-08

申请号：US266406

申请日：1981-05-22

申请人： Ward Baxter, II ,  Gerald F. Clancy ,  Ronald H. Gruner ,  Craig J. Mundie ,  Brett L. Bachman ,  Stephen R. Redfield ,  William N. Coder ,  Thomas M. Jones ,  David L. Houseman ,  Charles J. Young ,  Steven M. Haeffele

发明人： Ward Baxter, II ,  Gerald F. Clancy ,  Ronald H. Gruner ,  Craig J. Mundie ,  Brett L. Bachman ,  Stephen R. Redfield ,  William N. Coder ,  Thomas M. Jones ,  David L. Houseman ,  Charles J. Young ,  Steven M. Haeffele

IPC分类号： G06F9/318 ,  G06F9/35 ,  G06F13/00

CPC分类号： G06F9/30192 ,  G06F9/35

摘要： A data processing system having a flexible internal structure, protected from and effecitvely invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

摘要翻译： 具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并为用户提供灵活，简化的界面，保护用户不受任何用户无害的影响。 该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。 通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。 寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。 地址与系统物理配置无关。 信息被识别为细粒度级别和信息类型和格式。 保护机制提供与个体信息相关联的可变访问权限。 用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。 操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。