Systems and methods to respond to error detection
    1.
    发明授权
    Systems and methods to respond to error detection 有权
    响应错误检测的系统和方法

    公开(公告)号:US08572455B2

    公开(公告)日:2013-10-29

    申请号:US12546095

    申请日:2009-08-24

    IPC分类号: H03M13/00

    摘要: Systems and methods to respond to error detection are provided. First data may be received at a first memory controller port in response to a read command issued from the first memory controller port. The read command may be issued as a second read command from a second memory controller port after determining that the first data contains a first uncorrectable error. Second data may be received at the second memory controller port in response to the second read command. A repair write command may be issued from the first memory controller port after determining that the second data does not contain any errors. The repair write command may initiate writing the second data from the first memory controller port.

    摘要翻译: 提供了响应错误检测的系统和方法。 响应于从第一存储器控制器端口发出的读取命令,可以在第一存储器控制器端口接收第一数据。 在确定第一数据包含第一不可校正错误之后,可以从第二存储器控制器端口发出读取命令作为第二读取命令。 响应于第二读取命令,可以在第二存储器控制器端口接收第二数据。 在确定第二数据不包含任何错误之后,可以从第一存储器控制器端口发出修复写入命令。 修复写入命令可以开始从第一存储器控制器端口写入第二数据。

    System and Method for Responding to Error Detection
    2.
    发明申请
    System and Method for Responding to Error Detection 有权
    用于响应错误检测的系统和方法

    公开(公告)号:US20110066921A1

    公开(公告)日:2011-03-17

    申请号:US12561687

    申请日:2009-09-17

    IPC分类号: H03M13/05 G06F11/10

    摘要: Systems and methods to respond to error detection are provided. A particular method may include issuing a first command to a first redrive device and a second command to a second redrive device. The method may also include reissuing the second command to the second redrive device in response to detecting a transmission error between a memory controller and the second redrive device. The method may further include storing at a first buffer first data that is received from the first redrive device in response to the first command. The method may include storing at a second buffer second data that is received from the second redrive device in response to the reissued second command. The method also may include merging the second data with the first data.

    摘要翻译: 提供了响应错误检测的系统和方法。 特定方法可以包括向第一重新启动设备发出第一命令,以及向第二重新启动设备发出第二命令。 响应于检测到存储器控制器和第二重新驱动设备之间的传输错误,该方法还可以包括将第二命令重新发送到第二重新启动设备。 该方法还可以包括在第一缓冲器处存储响应于第一命令从第一重新启动设备接收到的数据。 该方法可以包括在第二缓冲器中存储响应于重新发出的第二命令从第二重新启动设备接收的第二数据。 该方法还可以包括将第二数据与第一数据合并。

    Systems and Methods to Respond to Error Detection
    3.
    发明申请
    Systems and Methods to Respond to Error Detection 有权
    系统和方法来应对错误检测

    公开(公告)号:US20110047440A1

    公开(公告)日:2011-02-24

    申请号:US12546095

    申请日:2009-08-24

    IPC分类号: G06F12/16 G06F11/08 G06F11/10

    摘要: Systems and methods to respond to error detection are provided. First data may be received at a first memory controller port in response to a read command issued from the first memory controller port. The read command may be issued as a second read command from a second memory controller port after determining that the first data contains a first uncorrectable error. Second data may be received at the second memory controller port in response to the second read command. A repair write command may be issued from the first memory controller port after determining that the second data does not contain any errors. The repair write command may initiate writing the second data from the first memory controller port.

    摘要翻译: 提供了响应错误检测的系统和方法。 响应于从第一存储器控制器端口发出的读取命令,可以在第一存储器控制器端口接收第一数据。 在确定第一数据包含第一不可校正错误之后,可以从第二存储器控制器端口发出读取命令作为第二读取命令。 响应于第二读取命令,可以在第二存储器控制器端口接收第二数据。 在确定第二数据不包含任何错误之后,可以从第一存储器控制器端口发出修复写入命令。 修复写入命令可以开始从第一存储器控制器端口写入第二数据。

    System and method for responding to error detection
    4.
    发明授权
    System and method for responding to error detection 有权
    用于响应错误检测的系统和方法

    公开(公告)号:US08539309B2

    公开(公告)日:2013-09-17

    申请号:US12561687

    申请日:2009-09-17

    IPC分类号: G11C29/38 G11C29/54

    摘要: Systems and methods to respond to error detection are provided. A particular method may include issuing a first command to a first redrive device and a second command to a second redrive device. The method may also include reissuing the second command to the second redrive device in response to detecting a transmission error between a memory controller and the second redrive device. The method may further include storing at a first buffer first data that is received from the first redrive device in response to the first command. The method may include storing at a second buffer second data that is received from the second redrive device in response to the reissued second command. The method also may include merging the second data with the first data.

    摘要翻译: 提供了响应错误检测的系统和方法。 特定方法可以包括向第一重新启动设备发出第一命令,以及向第二重新启动设备发出第二命令。 响应于检测到存储器控制器和第二重新驱动设备之间的传输错误,该方法还可以包括将第二命令重新发送到第二重新启动设备。 该方法还可以包括在第一缓冲器处存储响应于第一命令从第一重新启动设备接收到的数据。 该方法可以包括在第二缓冲器中存储响应于重新发出的第二命令从第二重新启动设备接收的第二数据。 该方法还可以包括将第二数据与第一数据合并。

    Systems and methods to efficiently schedule commands at a memory controller
    5.
    发明授权
    Systems and methods to efficiently schedule commands at a memory controller 有权
    在存储器控制器上有效地调度命令的系统和方法

    公开(公告)号:US08132048B2

    公开(公告)日:2012-03-06

    申请号:US12545192

    申请日:2009-08-21

    IPC分类号: G06F11/00

    CPC分类号: G06F11/141

    摘要: Systems and methods to respond to schedule commands at a memory controller are disclosed. A transmission error between a first memory controller port and a first redrive device may be detected. A first corrective action may be initiated at the first memory controller port in response to the detection of the transmission error. A particular method may include determining that a second memory controller port initiated a second corrective action. Incoming read commands may be distributed based on a comparison of the first corrective action and the second corrective action.

    摘要翻译: 公开了在存储器控制器上响应调度命令的系统和方法。 可以检测第一存储器控制器端口和第一重新启动设备之间的传输错误。 响应于传输错误的检测,可以在第一存储器控制器端口处启动第一校正动作。 特定方法可以包括确定第二存储器控制器端口启动第二校正动作。 可以基于第一校正动作和第二校正动作的比较来分发进入的读取命令。

    Systems and Methods to Efficiently Schedule Commands at a Memory Controller
    6.
    发明申请
    Systems and Methods to Efficiently Schedule Commands at a Memory Controller 有权
    在内存控制器上有效地调度命令的系统和方法

    公开(公告)号:US20110047400A1

    公开(公告)日:2011-02-24

    申请号:US12545192

    申请日:2009-08-21

    IPC分类号: G06F1/12 G06F11/00

    CPC分类号: G06F11/141

    摘要: Systems and methods to respond to schedule commands at a memory controller are disclosed. A transmission error between a first memory controller port and a first redrive device may be detected. A first corrective action may be initiated at the first memory controller port in response to the detection of the transmission error. A particular method may include determining that a second memory controller port initiated a second corrective action. Incoming read commands may be distributed based on a comparison of the first corrective action and the second corrective action.

    摘要翻译: 公开了在存储器控制器上响应调度命令的系统和方法。 可以检测第一存储器控制器端口和第一重新启动设备之间的传输错误。 响应于传输错误的检测,可以在第一存储器控制器端口处启动第一校正动作。 特定方法可以包括确定第二存储器控制器端口启动第二校正动作。 可以基于第一校正动作和第二校正动作的比较来分发进入的读取命令。

    Managing memory refreshes
    7.
    发明授权
    Managing memory refreshes 有权
    管理内存刷新

    公开(公告)号:US08397100B2

    公开(公告)日:2013-03-12

    申请号:US12723743

    申请日:2010-03-15

    IPC分类号: G06F11/07

    摘要: Systems and methods to manage memory refreshes at a memory controller are disclosed. A method includes determining, at a memory controller device, that a number of transmission errors between a memory controller port and a memory redrive device exceeds an error threshold. The method may include initiating a first link retraining process between the memory controller port and the memory redrive device. The method may further include placing one or more dynamic random access memory modules associated with the memory redrive device in a self-refresh mode. The method may also include removing the one or more dynamic random access memory modules from the self-refresh mode after the link retraining process has completed. The method may further include enabling overlapping refreshes of the one or more dynamic random access memory modules.

    摘要翻译: 公开了一种在存储器控制器上管理存储器刷新的系统和方法。 一种方法包括在存储器控制器设备处确定存储器控制器端口和存储器重新启动设备之间的传输错误的数量超过错误阈值。 该方法可以包括启动存储器控制器端口和存储器重新驱动设备之间的第一链路再培训过程。 该方法还可以包括将与存储器重新启动设备相关联的一个或多个动态随机存取存储器模块置于自刷新模式中。 该方法还可以包括在链路重新训练过程完成之后从自刷新模式移除一个或多个动态随机存取存储器模块。 该方法还可以包括实现一个或多个动态随机存取存储器模块的重叠刷新。

    Managing Memory Refreshes
    8.
    发明申请
    Managing Memory Refreshes 有权
    管理内存刷新

    公开(公告)号:US20110225465A1

    公开(公告)日:2011-09-15

    申请号:US12723743

    申请日:2010-03-15

    IPC分类号: G06F11/00 G06F12/00 G06F11/16

    摘要: Systems and methods to manage memory refreshes at a memory controller are disclosed. A method includes determining, at a memory controller device, that a number of transmission errors between a memory controller port and a memory redrive device exceeds an error threshold. The method may include initiating a first link retraining process between the memory controller port and the memory redrive device. The method may further include placing one or more dynamic random access memory modules associated with the memory redrive device in a self-refresh mode. The method may also include removing the one or more dynamic random access memory modules from the self-refresh mode after the link retraining process has completed. The method may further include enabling overlapping refreshes of the one or more dynamic random access memory modules.

    摘要翻译: 公开了一种在存储器控制器上管理存储器刷新的系统和方法。 一种方法包括在存储器控制器设备处确定存储器控制器端口和存储器重新启动设备之间的传输错误的数量超过错误阈值。 该方法可以包括启动存储器控制器端口和存储器重新驱动设备之间的第一链路再培训过程。 该方法还可以包括将与存储器重新启动设备相关联的一个或多个动态随机存取存储器模块置于自刷新模式中。 该方法还可以包括在链路重新训练过程完成之后从自刷新模式移除一个或多个动态随机存取存储器模块。 该方法还可以包括实现一个或多个动态随机存取存储器模块的重叠刷新。