Fast-locking phase-locked loop, transceiver, and communication device

    公开(公告)号:US12015688B1

    公开(公告)日:2024-06-18

    申请号:US18538841

    申请日:2023-12-13

    IPC分类号: H04L7/033

    CPC分类号: H04L7/033

    摘要: A fast-locking phase-locked loop comprises a phase frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, a frequency divider, and a fast-locking control unit which receives a reference clock signal at its first input terminal and a phase-locking enable signal at its second input terminal and outputs a reset signal at a high level in response to a rising edge of the reference clock signal when receiving the phase-locking enable signal, wherein the frequency divider is connected to an output terminal of the fast-locking control unit and configured to trigger generation of a feedback signal in response to the reset signal at the high level, and the phase frequency detector is connected to the output terminal of the fast-locking control unit and configured to output a phase error between the reference clock signal and the feedback signal in response to the reset signal at the high level.

    POWER MIXER HAVING HIGH LINEARITY TRANSCONDUCTANCE, TRANSMITTER AND RF TRANSCEIVER

    公开(公告)号:US20240146344A1

    公开(公告)日:2024-05-02

    申请号:US18499395

    申请日:2023-11-01

    IPC分类号: H04B1/04 H03D7/14

    摘要: The present disclosure provides a power mixer having high-linearity transconductance, a transmitter and an RF transceiver. The power mixer having high-linearity transconductance comprises a power mixer and the following circuit structure: a mixer switching circuit having an output terminal directly connected to an input terminal of the power mixer; and a transconductance amplifier having an input terminal connected to an input terminal of the mixer switching circuit, wherein the output terminal of the mixer switching circuit supplies a current to the power mixer based on a voltage received by the transconductance amplifier from the input terminal of the mixer switching circuit.

    Fractional frequency divider, radio frequency transceiver, and method of configuring phase delay

    公开(公告)号:US11962299B2

    公开(公告)日:2024-04-16

    申请号:US18364867

    申请日:2023-08-03

    IPC分类号: H03K21/02 H03K5/01 H03K5/00

    摘要: The present disclosure relates to a fractional frequency divider, a radio frequency transceiver, and a method of configuring a phase delay in the fractional frequency divider. The fractional frequency divider comprises a counter, a multiplexer, and a delay module. The method is applicable to the fractional frequency divider. The radio frequency transceiver comprises the fractional frequency divider, and the fractional frequency divider adopts the method. According to the aforesaid technical solution, the present disclosure has advantages as follows: the embodiments of the present disclosure can minimize the timing inaccuracy and suppress the output jitter and output spurs; and the embodiments of the present disclosure can effectively extend the operating frequency range of the fractional frequency divider.

    Matching network, antenna circuit and electronic device

    公开(公告)号:US11522567B1

    公开(公告)日:2022-12-06

    申请号:US17350443

    申请日:2021-06-17

    发明人: Sy-Chyuan Hwu

    IPC分类号: H04B1/04 H03F3/24 H03H7/38

    摘要: Provided are a matching network, an antenna circuit and an electronic device. The matching network includes a first inductor, a second inductor, and a third inductor, the first inductor having two ends serving as a pair of output terminals, the second inductor having two ends serving as a first pair of input terminals, and the third inductor having two ends serving as a second pair of input terminals, where a first coupling coefficient between the first inductor and the second inductor is greater than a second coupling coefficient between the first inductor and the third inductor. According to the matching network, the matching network can present a rather large resistance value conversion ratio even with a rather small area taken by inductors, the circuit design can be more flexible, and the signal interference can be lowered.

    Apparatus for protection against electrostatic discharge and method of manufacturing the same

    公开(公告)号:US11462904B2

    公开(公告)日:2022-10-04

    申请号:US17153291

    申请日:2021-01-20

    发明人: Chun Geik Tan

    IPC分类号: H02H9/04 H05F3/02

    摘要: The present disclosure discloses an apparatus for protection against electrostatic discharge and a method of manufacturing the same. The apparatus comprises: a first input/output pad electrically connected to an input/output pin and comprising an input/output protection circuit provided between a power source line and a ground line, wherein the input/output protection circuit is configured to release an electrostatic discharge current generated at the input/output pin; and a second input/output pad which is an empty pad electrically connected to the input/output pin and an RF input/output terminal of an internal RF circuit and is configured to receive a signal from the input/output pin and transmit the signal to the internal RF circuit. With the above apparatus, parasitic capacitive load can be minimized while electrostatic protection is performed on the RF circuit.

    Broadband power amplifier device and transmitter

    公开(公告)号:US11689227B1

    公开(公告)日:2023-06-27

    申请号:US17541638

    申请日:2021-12-03

    发明人: Sy-Chyuan Hwu

    摘要: A broadband power amplifier device includes an input matching network including first, second and third inductors, a driver amplifier, and first, second and third frequency modulators. First inductor has one end connected to output of a mixer and the other end connected to one end of the first frequency modulator, with the other end of the first frequency modulator being grounded. The second inductor has one end connected to one end of first inductor and the other end connected to input of driver amplifier, with second frequency modulator being connected across second inductor. Third inductor has one end connected to output of driver amplifier and the other end connected to input of power amplifier, with third frequency modulator being connected across third inductor. Bandwidth of power amplifier device can be extended and area and current consumption thereof can be reduced, while power can be improved without large LO driver.

    BROADBAND POWER AMPLIFIER DEVICE AND TRANSMITTER

    公开(公告)号:US20230179236A1

    公开(公告)日:2023-06-08

    申请号:US17541638

    申请日:2021-12-03

    发明人: Sy-Chyuan HWU

    IPC分类号: H04B1/04 H03F1/56 H03F3/24

    摘要: A broadband power amplifier device includes an input matching network including first, second and third inductors, a driver amplifier, and first, second and third frequency modulators. First inductor has one end connected to output of a mixer and the other end connected to one end of the first frequency modulator, with the other end of the first frequency modulator being grounded. The second inductor has one end connected to one end of first inductor and the other end connected to input of driver amplifier, with second frequency modulator being connected across second inductor. Third inductor has one end connected to output of driver amplifier and the other end connected to input of power amplifier, with third frequency modulator being connected across third inductor. Bandwidth of power amplifier device can be extended and area and current consumption thereof can be reduced, while power can be improved without large LO driver.

    Signal mixing circuit device and receiver

    公开(公告)号:US11251751B1

    公开(公告)日:2022-02-15

    申请号:US17126735

    申请日:2020-12-18

    发明人: Chun Geik Tan

    IPC分类号: H03D7/14 H04B1/16

    摘要: A signal mixing circuit device and a receiver are disclosed, the signal mixing circuit device comprising first to fourth mixers, first and second signal amplifying circuits, a signal strength detector, a controller and an attenuator. A signal strength value for the output from the first signal amplifying circuit is detected using the signal strength detector. If the signal strength value is less than a first threshold, a high-gain path is initiated, so that noises respectively input to the first and second mixers together with local oscillator signals are eliminated by the fourth and third mixers respectively, thereby ensuring a high signal-to-noise ratio. If the signal strength value is greater than a second threshold, a low-gain path is initiated, which partially reuses the circuit of the high-gain path, thereby effectively reducing the overall circuit area and decreasing chip cost and power consumption.

    Signal amplifying circuit device and receiver

    公开(公告)号:US11190142B1

    公开(公告)日:2021-11-30

    申请号:US16927292

    申请日:2020-07-13

    发明人: Chun Geik Tan

    IPC分类号: H03F3/45 H03F1/02 H03F3/195

    摘要: A signal amplifying circuit device comprises a mixer and a first and second amplifiers connected in series, where the mixer is configured to receive an RF signal and two LO signals with a preset phase difference therebetween and output a first and a second mixed signals, the first amplifier includes a first input terminal for receiving the first mixed signal, a second input terminal for receiving the second mixed signal, and a first and second output terminals, the second amplifier includes a first input terminal connected to the first output terminal of the first stage of amplifier at a first joint, a second input terminal connected to the second output terminal of the first stage of amplifier at a second joint, a first output terminal, and a second output terminal. A receiver including the signal amplifying circuit device is also disclosed.

    Operational amplifier and electronic system

    公开(公告)号:US12081175B2

    公开(公告)日:2024-09-03

    申请号:US18318879

    申请日:2023-05-17

    IPC分类号: H03F3/45 H03F1/32

    摘要: An operational amplifier, any of a pair of amplification circuits of its output-stage amplification circuit unit comprises: a first and second transistors, a capacitor and a DC bias circuit; a control electrode of the first transistor is connected with a corresponding output terminal of a preceding-stage amplification circuit unit, a first electrode thereof is connected with a first power terminal and a second electrode thereof is connected with an output terminal of an amplification circuit of the output-stage amplification circuit unit; an output terminal of the DC bias circuit is connected with a control electrode of the second transistor, a first electrode of which is connected with a second power terminal, and a second electrode thereof is connected with the output terminal; both ends of the capacitor are respectively connected with the control electrodes of the first and second transistors; and the first and second transistors are of opposite polarities.