公开(公告)号：US07544553B2

公开(公告)日：2009-06-09

申请号：US11094367

申请日：2005-03-30

申请人： Marcus Culmsee ,  Hermann Wendt ,  Lothar Doni

发明人： Marcus Culmsee ,  Hermann Wendt ,  Lothar Doni

IPC分类号： H01L23/336 ,  H01L21/3205

CPC分类号： H01L29/665 ,  H01L21/28097 ,  H01L29/66545 ,  H01L29/6656

摘要： To form a semiconductor device, a silicon (e.g., polysilicon) gate layer is formed over a gate dielectric and a sacrificial layer (preferably titanium nitride) is formed over the silicon gate layer. The silicon gate layer and the sacrificial layer are patterned to form a gate structure. A spacer, such as an oxide sidewall spacer and a nitride sidewall spacer, is formed adjacent the sidewall of the gate structure. The semiconductor body is then doped to form a source region and a drain region that are self-aligned to the spacers. The sacrificial layer can then be removed selectively with respect to the oxide sidewall spacer, the nitride sidewall spacer and the silicon gate. A metal layer (e.g., nickel) is formed over the source region, the drain region and the silicon gate and reacted with these regions to form a silicided source contact, a silicided drain contact and a silicided gate.

摘要翻译： 为了形成半导体器件，在栅极电介质上形成硅（例如，多晶硅）栅极层，并且在硅栅极层上形成牺牲层（优选氮化钛）。 图案化硅栅极层和牺牲层以形成栅极结构。 邻近栅极结构的侧壁形成间隔物，例如氧化物侧壁间隔物和氮化物侧壁间隔物。 然后，半导体体被掺杂以形成与间隔物自对准的源极区域和漏极区域。 然后可以相对于氧化物侧壁间隔物，氮化物侧壁间隔物和硅栅极选择性地去除牺牲层。 在源极区域，漏极区域和硅栅极上形成金属层（例如镍），并与这些区域反应以形成硅化物源极接触，硅化物漏极接触和硅化物栅极。

公开(公告)号：US20070205489A1

公开(公告)日：2007-09-06

申请号：US11365226

申请日：2006-03-01

申请人： Armin Tilke ,  Marcus Culmsee ,  Chris Stapelmann ,  Bee Hong ,  Roland Hampp

发明人： Armin Tilke ,  Marcus Culmsee ,  Chris Stapelmann ,  Bee Hong ,  Roland Hampp

IPC分类号： H01L29/06

CPC分类号： H01L29/0649 ,  H01L21/02271 ,  H01L21/76229 ,  H01L21/76232

摘要： Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device.

摘要翻译： 公开了制造半导体器件的隔离区域的方法及其结构。 在优选实施例中，半导体器件包括工件和形成在工件中的至少一个沟槽。 所述至少一个沟槽包括侧壁，底面，下部和上部。 第一衬垫设置在所述至少一个沟槽的侧壁和底表面上。 第二衬垫设置在至少一个沟槽的下部中的第一衬垫之上。 第一绝缘材料设置在至少一个沟槽的下部中的第二衬垫上。 第二绝缘材料设置在至少一个沟槽的上部中的第一绝缘材料之上。 第一衬垫，第二衬垫，第一绝缘材料和第二绝缘材料包括半导体器件的隔离区域。

公开(公告)号：US20060228844A1

公开(公告)日：2006-10-12

申请号：US11094367

申请日：2005-03-30

申请人： Marcus Culmsee ,  Hermann Wendt ,  Lothar Doni

发明人： Marcus Culmsee ,  Hermann Wendt ,  Lothar Doni

IPC分类号： H01L21/8234 ,  H01L21/336

CPC分类号： H01L29/665 ,  H01L21/28097 ,  H01L29/66545 ,  H01L29/6656

摘要： To form a semiconductor device, a silicon (e.g., polysilicon) gate layer is formed over a gate dielectric and a sacrificial layer (preferably titanium nitride) is formed over the silicon gate layer. The silicon gate layer and the sacrificial layer are patterned to form a gate structure. A spacer, such as an oxide sidewall spacer and a nitride sidewall spacer, is formed adjacent the sidewall of the gate structure. The semiconductor body is then doped to form a source region and a drain region that are self-aligned to the spacers. The sacrificial layer can then be removed selectively with respect to the oxide sidewall spacer, the nitride sidewall spacer and the silicon gate. A metal layer (e.g., nickel) is formed over the source region, the drain region and the silicon gate and reacted with these regions to form a silicided source contact, a silicided drain contact and a silicided gate.

公开(公告)号：US07364975B2

公开(公告)日：2008-04-29

申请号：US11490301

申请日：2006-07-20

申请人： Marcus Culmsee ,  Frank Weber ,  Josef Maynollo

发明人： Marcus Culmsee ,  Frank Weber ,  Josef Maynollo

IPC分类号： H01L21/336 ,  H01L21/76 ,  H01L21/8238

CPC分类号： H01L21/76229

摘要： Methods of fabricating semiconductor devices are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece including a plurality of active area regions defined therein, and forming at least one trench in the workpiece between at least two of the plurality of active area regions. A first insulating material is deposited over the plurality of active area regions and the at least one trench, partially filling the at least one trench with the first insulating material and forming peaks of the first insulating material over the plurality of active area regions. A masking material is formed over the first insulating material in the at least one trench, leaving the peaks of the first insulating material over the plurality of active area regions completely exposed. At least the peaks of the first insulating material are removed from over the plurality of active area regions.

公开(公告)号：US20070087565A1

公开(公告)日：2007-04-19

申请号：US11252924

申请日：2005-10-18

申请人： Marcus Culmsee ,  Tae Hoon Lee

发明人： Marcus Culmsee ,  Tae Hoon Lee

IPC分类号： H01L21/44 ,  H01L21/302

CPC分类号： H01L21/3081 ,  H01L21/31053 ,  H01L21/76229

摘要： Methods of forming isolation regions for semiconductor devices and structures thereof are disclosed. A workpiece having a top surface is provided, a chemical mechanical polish (CMP) stop layer is formed over the workpiece, and a sacrificial material is formed over the CMP stop layer. The sacrificial material, the CMP stop layer, and the workpiece are patterned with a trench for an isolation region. The isolation region is filled with an insulating material, and a CMP process is used to remove the insulating material from over the top surface of the CMP stop layer. The sacrificial material is removed during the CMP process.

摘要翻译： 公开了形成半导体器件隔离区的方法及其结构。 提供具有顶表面的工件，在工件上形成化学机械抛光（CMP）阻挡层，并且在CMP停止层上形成牺牲材料。 牺牲材料，CMP停止层和工件用用于隔离区域的沟槽图案化。 隔离区填充有绝缘材料，CMP工艺用于从CMP停止层的顶表面上除去绝缘材料。 牺牲材料在CMP过程中被去除。

公开(公告)号：US08936995B2

公开(公告)日：2015-01-20

申请号：US11365226

申请日：2006-03-01

申请人： Armin Tilke ,  Marcus Culmsee ,  Chris Stapelmann ,  Bee Kim Hong ,  Roland Hampp

发明人： Armin Tilke ,  Marcus Culmsee ,  Chris Stapelmann ,  Bee Kim Hong ,  Roland Hampp

IPC分类号： H01L21/762 ,  H01L21/77

CPC分类号： H01L29/0649 ,  H01L21/02271 ,  H01L21/76229 ,  H01L21/76232

摘要： Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device.

摘要翻译： 公开了制造半导体器件的隔离区域的方法及其结构。 在优选实施例中，半导体器件包括工件和形成在工件中的至少一个沟槽。 所述至少一个沟槽包括侧壁，底面，下部和上部。 第一衬垫设置在所述至少一个沟槽的侧壁和底表面上。 第二衬垫设置在至少一个沟槽的下部中的第一衬垫之上。 第一绝缘材料设置在至少一个沟槽的下部中的第二衬垫上。 第二绝缘材料设置在至少一个沟槽的上部中的第一绝缘材料之上。 第一衬垫，第二衬垫，第一绝缘材料和第二绝缘材料包括半导体器件的隔离区域。

公开(公告)号：US20080020534A1

公开(公告)日：2008-01-24

申请号：US11490301

申请日：2006-07-20

申请人： Marcus Culmsee ,  Frank Weber ,  Josef Maynollo

发明人： Marcus Culmsee ,  Frank Weber ,  Josef Maynollo

IPC分类号： H01L21/336

CPC分类号： H01L21/76229

摘要： Methods of fabricating semiconductor devices are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece including a plurality of active area regions defined therein, and forming at least one trench in the workpiece between at least two of the plurality of active area regions. A first insulating material is deposited over the plurality of active area regions and the at least one trench, partially filling the at least one trench with the first insulating material and forming peaks of the first insulating material over the plurality of active area regions. A masking material is formed over the first insulating material in the at least one trench, leaving the peaks of the first insulating material over the plurality of active area regions completely exposed. At least the peaks of the first insulating material are removed from over the plurality of active area regions.

摘要翻译： 公开了制造半导体器件的方法。 在优选实施例中，制造半导体器件的方法包括提供包括限定在其中的多个有源区域区域的工件，以及在多个有源区域区域中的至少两个之间的工件中形成至少一个沟槽。 第一绝缘材料沉积在多个有源区域区域和至少一个沟槽上，部分地用第一绝缘材料填充至少一个沟槽，并在多个有源区域上形成第一绝缘材料的峰值。 掩模材料形成在至少一个沟槽中的第一绝缘材料之上，从而使多个有源区域上的第一绝缘材料的峰值完全暴露。 至少从多个有源区域区域去除第一绝缘材料的峰值。

公开(公告)号：US20080011322A1

公开(公告)日：2008-01-17

申请号：US11484231

申请日：2006-07-11

申请人： Frank Weber ,  Marcus Culmsee

发明人： Frank Weber ,  Marcus Culmsee

IPC分类号： C23G1/00 ,  B08B3/00

CPC分类号： H01L21/67051 ,  B08B3/02 ,  B08B3/10 ,  H01L21/02057

摘要： Cleaning systems and methods are provided. A preferred embodiment comprises a method of cleaning that includes providing a device and disposing a cleaning fluid on the device. The cleaning fluid includes a first component saturated with a second component. The first component comprises a liquid, and the second component comprises a material that is releasable from the cleaning fluid as a gas. The second component is caused to be released from the cleaning fluid while the cleaning fluid is disposed on the device.

摘要翻译： 提供清洁系统和方法。 优选的实施例包括一种清洁方法，其包括提供装置并将清洁流体设置在装置上。 清洁流体包括用第二组分饱和的第一组分。 第一部件包括液体，第二部件包括可作为气体从清洁流体释放的材料。 在将清洁流体设置在设备上时，使第二部件从清洁流体释放。