Optimization of instructions to reduce memory access violations
    1.
    发明授权
    Optimization of instructions to reduce memory access violations 有权
    优化指令以减少内存访问冲突

    公开(公告)号:US09342284B2

    公开(公告)日:2016-05-17

    申请号:US14040077

    申请日:2013-09-27

    摘要: Mechanisms for reducing memory access violations are disclosed. Sets of instructions may be identified and the identified sets of instructions may be re-translated or optimized to generate other sets of instructions. Execution of the other sets of instructions is analyzed to determine whether additional memory access violations occur. When additional memory access violations occur, further sets of instructions may be generated or re-translation/optimization of instructions may be disabled.

    摘要翻译: 公开了减少内存访问冲突的机制。 可以识别指令集,并且可以重新翻译或优化所识别的指令集以产生其他指令集。 分析执行其他指令集以确定是否发生附加的存储器访问冲突。 当发生额外的存储器访问冲突时,可以生成另外的指令集,或者可以禁用重新转换/优化指令。

    OPTIMIZATION OF INSTRUCTIONS TO REDUCE MEMORY ACCESS VIOLATIONS
    2.
    发明申请
    OPTIMIZATION OF INSTRUCTIONS TO REDUCE MEMORY ACCESS VIOLATIONS 有权
    优化指令以减少内存访问违规

    公开(公告)号:US20150095625A1

    公开(公告)日:2015-04-02

    申请号:US14040077

    申请日:2013-09-27

    IPC分类号: G06F9/30

    摘要: Mechanisms for reducing memory access violations are disclosed. Sets of instructions may be identified and the identified sets of instructions may be re-translated or optimized to generate other sets of instructions. Execution of the other sets of instructions is analyzed to determine whether additional memory access violations occur. When additional memory access violations occur, further sets of instructions may be generated or re-translation/optimization of instructions may be disabled.

    摘要翻译: 公开了减少内存访问冲突的机制。 可以识别指令集,并且可以重新翻译或优化所识别的指令集以产生其他指令集。 分析执行其他指令集以确定是否发生附加的存储器访问冲突。 当发生额外的存储器访问冲突时,可以生成另外的指令集,或者可以禁用重新转换/优化指令。