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公开(公告)号：US09184072B2
公开(公告)日：2015-11-10
申请号：US11829258
申请日：2007-07-27
申请人： Daniel J. Devine , Charles Crapuchettes , Dixit Desai , Rene George , Vincent C. Lee , Yuya Matsuda , Jonathan Mohn , Ryan M. Pakulski , Stephen E. Savas , Martin Zucker
发明人： Daniel J. Devine , Charles Crapuchettes , Dixit Desai , Rene George , Vincent C. Lee , Yuya Matsuda , Jonathan Mohn , Ryan M. Pakulski , Stephen E. Savas , Martin Zucker
CPC分类号： H01L21/6719 , H01L21/67069 , Y10T29/49
摘要： An apparatus and method are described for processing workpieces in a treatment process. A multi-wafer chamber defines a chamber interior including at least two processing stations within the chamber interior such that the processing stations share the chamber interior. Each processing station includes a plasma source and a workpiece pedestal for exposing one of the workpieces to the treatment process using a respective plasma source. The chamber includes an arrangement of one or more electrically conductive surfaces that are asymmetrically disposed about the workpiece at each processing station in a way which produces a given level of uniformity of the treatment process on a major surface of each workpiece. A shield arrangement provides an enhanced uniformity of exposure of the workpiece to the respective one of the plasma sources that is greater than the given level of uniformity that would be provided in an absence of the shield arrangement.
摘要翻译： 描述了用于在处理过程中处理工件的装置和方法。 多晶片室限定腔室内部，其包括腔室内部的至少两个处理站，使得处理站共享腔室内部。 每个处理站包括等离子体源和用于使用相应的等离子体源将工件中的一个暴露于处理过程的工件基座。 腔室包括一个或多个导电表面的布置，其以在每个加工工位上围绕工件不对称地设置，以在每个工件的主表面上产生给定水平的处理工艺的均匀性。 屏蔽装置提供了工件对等离子体源的相对一个的曝光增强的均匀性，其大于在没有屏蔽装置的情况下提供的给定的均匀度水平。
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公开(公告)号：US08993430B2
公开(公告)日：2015-03-31
申请号：US13411925
申请日：2012-03-05
申请人： Yuya Matsuda
发明人： Yuya Matsuda
IPC分类号： H01L21/28 , H01L23/48 , H01L23/58 , H01L27/115
CPC分类号： H01L21/76895 , H01L21/0337 , H01L21/0338 , H01L21/3088 , H01L23/585 , H01L27/11519 , H01L27/11521 , H01L27/11529 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a first core pattern is formed in a wiring portion on a process target film and a second core pattern, which is led out from the first core pattern and includes an opening, is formed in a leading portion on the process target film, a sidewall pattern is formed along an outer periphery of the first core pattern and the second core pattern and a sidewall dummy pattern is formed along an inner periphery of the opening of the second core pattern, the first core pattern and the second core pattern are removed, and the process target film is processed to transfer the sidewall pattern and the sidewall dummy pattern.
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公开(公告)号：US20130082388A1
公开(公告)日：2013-04-04
申请号：US13411925
申请日：2012-03-05
申请人： Yuya Matsuda
发明人： Yuya Matsuda
CPC分类号： H01L21/76895 , H01L21/0337 , H01L21/0338 , H01L21/3088 , H01L23/585 , H01L27/11519 , H01L27/11521 , H01L27/11529 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a first core pattern is formed in a wiring portion on a process target film and a second core pattern, which is led out from the first core pattern and includes an opening, is formed in a leading portion on the process target film, a sidewall pattern is formed along an outer periphery of the first core pattern and the second core pattern and a sidewall dummy pattern is formed along an inner periphery of the opening of the second core pattern, the first core pattern and the second core pattern are removed, and the process target film is processed to transfer the sidewall pattern and the sidewall dummy pattern.
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公开(公告)号：US20090028761A1
公开(公告)日：2009-01-29
申请号：US11829258
申请日：2007-07-27
申请人： Daniel J. Devine , Charles Crapuchettes , Dixit Desai , Rene George , Vincent C. Lee , Yuya Matsuda , Jonathan Mohn , Ryan M. Pakulski , Stephen E. Savas , Martin Zucker
发明人： Daniel J. Devine , Charles Crapuchettes , Dixit Desai , Rene George , Vincent C. Lee , Yuya Matsuda , Jonathan Mohn , Ryan M. Pakulski , Stephen E. Savas , Martin Zucker
CPC分类号： H01L21/6719 , H01L21/67069 , Y10T29/49
摘要： An apparatus and method are described for processing workpieces in a treatment process. A multi-wafer chamber defines a chamber interior including at least two processing stations within the chamber interior such that the processing stations share the chamber interior. Each processing station includes a plasma source and a workpiece pedestal for exposing one of the workpieces to the treatment process using a respective plasma source. The chamber includes an arrangement of one or more electrically conductive surfaces that are asymmetrically disposed about the workpiece at each processing station in a way which produces a given level of uniformity of the treatment process on a major surface of each workpiece. A shield arrangement provides an enhanced uniformity of exposure of the workpiece to the respective one of the plasma sources that is greater than the given level of uniformity that would be provided in an absence of the shield arrangement.
摘要翻译： 描述了用于在处理过程中处理工件的装置和方法。 多晶片室限定腔室内部，其包括腔室内部的至少两个处理站，使得处理站共享腔室内部。 每个处理站包括等离子体源和用于使用相应的等离子体源将工件中的一个暴露于处理过程的工件基座。 腔室包括一个或多个导电表面的布置，其以在每个加工工位上围绕工件不对称地设置，以在每个工件的主表面上产生给定水平的处理工艺的均匀性。 屏蔽装置提供了工件对等离子体源的相对一个的曝光增强的均匀性，其大于在没有屏蔽装置的情况下提供的给定的均匀度水平。
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