公开(公告)号：US20140124829A1

公开(公告)日：2014-05-08

申请号：US14149412

申请日：2014-01-07

Applicant: ABB TECHNOLOGY AG

Inventor： Maxi ANDENNA ,  Munaf RAHIMO ,  Chiara CORVASCE ,  Arnost KOPTA

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/66348 ,  H01L29/7395

Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract translation: IGBT在发射极和集电极侧之间具有层。 这些层包括在集电极侧的集电极层，漂移层，第二导电类型的基极层，布置在基底层上朝向发射极侧的第一源极区域，设置在基极层的侧面并延伸的沟槽栅电极 漂移层比基层更深，井底侧布置在基层上并且比基层更深地延伸到漂移层中，围绕基层的增强层，以便使基层与漂移层完全分离，并且 阱，覆盖阱并通过第二电绝缘层与阱分离的导电层，以及在导电层顶部具有凹陷的第三绝缘层，使得导电层与发射极电气接触。

公开(公告)号：US20140124830A1

公开(公告)日：2014-05-08

申请号：US14154736

申请日：2014-01-14

Applicant: ABB Technology AG

Inventor： Munaf RAHIMO ,  Maxi ANDENNA ,  Chiara CORVASCE ,  Arnost KOPTA

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/7397

Abstract: An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Abstract translation: IGBT在发射极和集电极侧之间具有层，包括漂移层，与发射极电气接触并与漂移层完全分离的基极层，布置在基极层上的发射极侧的第一和第二源极区域，并且电接触发射极 电极，以及第一和第二沟槽栅电极。 第一沟槽栅极电极通过第一绝缘层与基极层，第一源极区域和漂移层分离。 在发射电极，第一源极区域，基极层和漂移层之间形成通道。 第二绝缘层设置在第一沟槽栅电极的顶部。 增强层将基底层与漂移层分开。 第二沟槽栅极电极通过第三绝缘层与基极层，增强层和漂移层分离。

公开(公告)号：US20140034997A1

公开(公告)日：2014-02-06

申请号：US14046156

申请日：2013-10-04

Applicant: ABB Technology AG

Inventor： Munaf RAHIMO ,  Arnost KOPTA ,  Thomas CLAUSEN ,  Maxi ANDENNA

IPC: H01L29/66 ,  H01L29/739

CPC classification number: H01L29/66325 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/6609 ,  H01L29/66136 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/861

Abstract: A method for manufacturing a bipolar punch-through semiconductor device is disclosed, which includes providing a wafer having a first and a second side, wherein on the first side a high-doped layer of the first conductivity type having constant high doping concentration is arranged; epitaxially growing a low-doped layer of the first conductivity type on the first side; performing a diffusion step by which a diffused inter-space region is created at the inter-space of the layers; creating at least one layer of the second conductivity type on the first side; and reducing the wafer thickness within the high-doped layer on the second side so that a buffer layer is created, which can include the inter-space region and the remaining part of the high-doped layer, wherein the doping profile of the buffer layer decreases steadily from the doping concentration of the high-doped region to the doping concentration of the drift layer.

Abstract translation: 公开了一种制造双极穿通半导体器件的方法，其包括提供具有第一和第二侧的晶片，其中在第一侧上布置具有恒定的高掺杂浓度的第一导电类型的高掺杂层; 在第一侧上外延生长第一导电类型的低掺杂层; 执行扩散步骤，通过该扩散步骤在层的间隔处产生扩散的空间间区域; 在第一侧产生至少一层第二导电类型; 并且减小第二侧上的高掺杂层内的晶片厚度，从而形成缓冲层，其可以包括空间间区域和高掺杂层的剩余部分，其中缓冲层的掺杂分布 从高掺杂区域的掺杂浓度稳定地降低到漂移层的掺杂浓度。