公开(公告)号：US20240126552A1

公开(公告)日：2024-04-18

申请号：US18393657

申请日：2023-12-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JOHN KALAMATIANOS ,  MICHAEL T. CLARK ,  MARIUS EVERS ,  WILLIAM L. WALKER ,  PAUL MOYER ,  JAY FLEISCHMAN ,  JAGADISH B. KOTRA

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/52

CPC classification number: G06F9/30181 ,  G06F9/30043 ,  G06F9/30098 ,  G06F9/30138 ,  G06F9/3834 ,  G06F9/3877 ,  G06F9/52

Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.

公开(公告)号：US20220188117A1

公开(公告)日：2022-06-16

申请号：US17123270

申请日：2020-12-16

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JOHN KALAMATIANOS ,  MICHAEL T. CLARK ,  MARIUS EVERS ,  WILLIAM L. WALKER ,  PAUL MOYER ,  JAY FLEISCHMAN ,  JAGADISH B. KOTRA

IPC: G06F9/30 ,  G06F9/52

Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.

公开(公告)号：US20210373896A1

公开(公告)日：2021-12-02

申请号：US16889010

申请日：2020-06-01

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： THOMAS CLOUQUEUR ,  MARIUS EVERS ,  APARNA MANDKE ,  STEVEN R. HAVLIR ,  ROBERT COHEN ,  ANTHONY JARVIS

IPC: G06F9/38 ,  G06F9/48

Abstract: Merging branch target buffer entries includes maintaining, in a branch target buffer, an entry corresponding to first branch instruction, where the entry identifies a first branch target address for the first branch instruction and a second branch target address for a second branch instruction; and accessing, based on the first branch instruction, the entry.