MANAGING COHERENT MEMORY BETWEEN AN ACCELERATED PROCESSING DEVICE AND A CENTRAL PROCESSING UNIT
    3.
    发明申请
    MANAGING COHERENT MEMORY BETWEEN AN ACCELERATED PROCESSING DEVICE AND A CENTRAL PROCESSING UNIT 审中-公开
    管理加速处理装置与中央处理装置之间的相关记忆

    公开(公告)号:US20160364334A1

    公开(公告)日:2016-12-15

    申请号:US15246056

    申请日:2016-08-24

    Abstract: Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems. Specifically, a CPU cannot effectively write to a block of memory and then have a GPU access that memory unless there is explicit synchronization. In addition, because the GPU is forced to statically split memory locations between itself and the CPU, existing multiprocessor computing systems are unable to efficiently utilize the separate memory systems. Embodiments described herein overcome these deficiencies by receiving a notification within the GPU that the CPU has finished processing data that is stored in coherent memory, and invalidating data in the CPU caches that the GPU has finished processing from the coherent memory. Embodiments described herein also include dynamically partitioning a GPU memory into coherent memory and local memory through use of a probe filter.

    Abstract translation: 现有的多处理器计算系统通常具有不足的存储器一致性,因此不能有效地利用单独的存储器系统。 具体来说,CPU无法有效地写入内存块,然后除了有明确的同步之外,还可以对存储器进行GPU访问。 另外,由于GPU被迫静态分割其本身与CPU之间的存储器位置,所以现有的多处理器计算系统不能有效地利用单独的存储器系统。 本文所描述的实施例通过在GPU内接收到通知,CPU已经完成处理存储在相干存储器中的数据,并使CPU缓冲器中的数据无效,GPU已经从相干存储器完成处理来克服这些缺陷。 本文描述的实施例还包括通过使用探针滤波器来将GPU存储器动态地划分为相干存储器和本地存储器。

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