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    DISPLAY CIRCUITRY AND METHOD TO UTILIZE SEGMENTED RESISTORS FOR OPTIMIZING FRONT OF SCREEN PERFORMANCE
    1.
    发明申请
    DISPLAY CIRCUITRY AND METHOD TO UTILIZE SEGMENTED RESISTORS FOR OPTIMIZING FRONT OF SCREEN PERFORMANCE 审中-公开

    公开(公告)号：US20200294435A1

    公开(公告)日：2020-09-17

    申请号：US16574572

    申请日：2019-09-18

    Applicant: Apple Inc.

    Inventor： Fenghua Zheng ,  Shatam Agarwal

    IPC: G09G3/20

    Abstract: Aspects of the subject technology relate to control circuitry for displays. A display control circuitry includes a plurality of amplifiers to drive gamma signals for a pixel array having a plurality of pixels of a display and a segmented resistor string coupled to the plurality of amplifiers. The resistor string includes a plurality of resistor segments with a resistor segment being designed with a modified resistance to modify display performance parameters including at least one of a settling time of an associated gamma signal, a power supply rejection ratio (PSRR) of an amplifier of the plurality of amplifiers, or an output voltage offset of an amplifier of the plurality of amplifiers.

    Content driven overdrive for display devices
    2.
    发明授权
    Content driven overdrive for display devices 有权

    公开(公告)号：US09916787B2

    公开(公告)日：2018-03-13

    申请号：US15060323

    申请日：2016-03-03

    Applicant: Apple Inc.

    Inventor： Fenghua Zheng ,  Paolo Sacchetto

    IPC: G09G3/20 ,  G09G3/32

    CPC classification number: G09G3/32 ,  G09G2310/0248 ,  G09G2310/0275 ,  G09G2320/0285

    Abstract: This application sets forth systems, methods, and apparatus for improving charge settling times for lines and pixels of a display panel. The charge settling times are improved by providing an over drive signal and a bias current to a line and/or pixel of the display panel based a comparison of content data to be output by the display panel. In this way, by initially charging the line and/or pixel with the over drive signal, the line and/or pixel can be fully charged more quickly in display panels that operate at higher refresh rates.

    MULTI-ZONED VARIABLE VCOM CONTROL
    4.
    发明申请
    MULTI-ZONED VARIABLE VCOM CONTROL 审中-公开
    多区可变VCOM控制

    公开(公告)号：US20170061864A1

    公开(公告)日：2017-03-02

    申请号：US15246666

    申请日：2016-08-25

    Applicant: Apple Inc.

    Inventor： Howard H. Tang ,  Paolo Sacchetto ,  Chaohao Wang ,  Szu-Hsien Lee ,  Patrick Bennett ,  Fenghua Zheng

    IPC: G09G3/20

    CPC classification number: G09G3/2096 ,  G09G3/3655 ,  G09G3/3666 ,  G09G2300/0426 ,  G09G2310/0291 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2320/0266

    Abstract: The disclosure relates to systems and methods for reducing VCOM settling periods. A number of pixels is sub-divided into a plurality of regions. The pixels are configured to transmit light. A common voltage (VCOM) driving circuit is configured to drive a common electrode of the pixels. Moreover, each of a number of VCOM driving circuits includes a variable resistor configured to be driven to a resistance level based at least in part on which region of the plurality of regions includes an active pixel within the region. Furthermore, a resistance level is set and based at least in part on where the active pixel is located.

    Abstract translation: 本公开涉及用于减少VCOM建立周期的系统和方法。 多个像素被细分为多个区域。 像素被配置为透射光。 公共电压（VCOM）驱动电路被配置为驱动像素的公共电极。 此外，多个VCOM驱动电路中的每一个包括被配置为至少部分地基于该区域中的有源像素的多个区域的哪个区域被驱动到电阻电平的可变电阻器。 此外，设置电阻水平并且至少部分地基于活动像素位于何处。

    Display Driver Circuitry With Gate Line and Data Line Delay Compensation
    5.
    发明申请
    Display Driver Circuitry With Gate Line and Data Line Delay Compensation 审中-公开
    显示驱动器电路与栅极线和数据线延迟补偿

    公开(公告)号：US20160365042A1

    公开(公告)日：2016-12-15

    申请号：US14740057

    申请日：2015-06-15

    Applicant: Apple Inc.

    Inventor： Fenghua Zheng ,  Sandro H. Pintz

    IPC: G09G3/36

    CPC classification number: G09G3/36 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0286 ,  G09G2320/0223

    Abstract: Gate driver circuitry in a display may supply gate line signals to rows of pixels on gate lines. Data line driver circuitry may supply data line signals to columns of pixels on data lines. The gate driver circuitry may have registers that are coupled to form a shift register that supplies the gate line signals to the gate lines. To compensate for data line signal propagation delays, the registers of the shift register may be clocked with increasingly delayed clocks as a function of increasing distance away from the display driver circuitry. To compensate for gate line signal propagation delays, the data line driver circuitry may impose increasing delays on the data line signals carried on the data lines as a function of increasing distance of the data lines away from the gate driver circuitry.

    Abstract translation: 显示器中的栅极驱动器电路可以向栅极线上的像素行提供栅极线信号。 数据线驱动器电路可以将数据线信号提供给数据线上的像素列。 栅极驱动器电路可以具有被耦合以形成将栅极线信号提供给栅极线的移位寄存器的寄存器。 为了补偿数据线信号传播延迟，移位寄存器的寄存器可以以越来越多的延迟的时钟作为与显示驱动器电路的距离增加的函数的时钟。 为了补偿栅极线信号传播延迟，数据线驱动器电路可以对数据线上承载的数据线信号施加增加的延迟，这是随着数据线远离栅极驱动器电路的距离增加的函数。

    LOW POWER DISPLAY DEVICE WITH VARIABLE REFRESH RATES
    6.
    发明申请
    LOW POWER DISPLAY DEVICE WITH VARIABLE REFRESH RATES 有权
    低功率显示设备，具有可变的刷新率

    公开(公告)号：US20140198138A1

    公开(公告)日：2014-07-17

    申请号：US14155297

    申请日：2014-01-14

    Applicant: Apple Inc.

    Inventor： Prasanna Nambi ,  Jason N. Gomez ,  Fenghua Zheng ,  Paolo Sacchetto ,  Sandro H. Pintz ,  Taesung Kim ,  Christopher P. Tann ,  Marc Albrecht ,  David W. Lum

    IPC: G09G3/36

    CPC classification number: G09G3/3618 ,  G06T1/20 ,  G06T2210/52 ,  G09G3/36 ,  G09G3/3611 ,  G09G3/3648 ,  G09G3/3655 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/0626 ,  G09G2330/02 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2360/18 ,  G09G2370/08

    Abstract: The disclosure describes procedures for dynamically employing a variable refresh rate at an LCD display of a consumer electronic device, such as a laptop computer, a tablet computer, a mobile phone, or a music player device. In some configurations, the consumer electronic device can include a host system portion, having one or more processors and a display system portion, having a timing controller, a buffer circuit, a display driver, and a display panel. The display system can receive image data and image control data from a GPU of the host system, evaluate the received image control data to determine a reduced refresh rate (RRR) for employing at the display panel, and then transition to the RRR, whenever practicable, to conserve power. In some scenarios, the transition to the RRR can be a transition from a LRR of 50 hertz or above to a RRR of 40 hertz or below.

    Abstract translation: 本公开描述了在诸如膝上型计算机，平板计算机，移动电话或音乐播放器设备的消费电子设备的LCD显示器上动态地采用可变刷新率的过程。 在一些配置中，消费电子设备可以包括具有一个或多个处理器的主机系统部分和具有定时控制器，缓冲电路，显示驱动器和显示面板的显示系统部分。 显示系统可以从主机系统的GPU接收图像数据和图像控制数据，评估所接收的图像控制数据，以确定在显示面板上使用的刷新率降低（RRR），然后在切实可行的情况下转换到RRR ，以节省权力。 在某些情况下，过渡到RRR可以是从50赫兹或更高的LRR到40赫兹或更低的RRR的转换。

    Display circuitry and method to utilize segmented resistors for optimizing front of screen performance
    8.
    发明授权
    Display circuitry and method to utilize segmented resistors for optimizing front of screen performance 有权

    公开(公告)号：US11081032B2

    公开(公告)日：2021-08-03

    申请号：US16574572

    申请日：2019-09-18

    Applicant: Apple Inc.

    Inventor： Fenghua Zheng ,  Shatam Agarwal

    IPC: G09G3/20

    Abstract: Aspects of the subject technology relate to control circuitry for displays. A display control circuitry includes a plurality of amplifiers to drive gamma signals for a pixel array having a plurality of pixels of a display and a segmented resistor string coupled to the plurality of amplifiers. The resistor string includes a plurality of resistor segments with a resistor segment being designed with a modified resistance to modify display performance parameters including at least one of a settling time of an associated gamma signal, a power supply rejection ratio (PSRR) of an amplifier of the plurality of amplifiers, or an output voltage offset of an amplifier of the plurality of amplifiers.

    Intra-Frame Interpolation Based Line-by-Line Tuning for Electronic Displays
    9.
    发明申请
    Intra-Frame Interpolation Based Line-by-Line Tuning for Electronic Displays 有权

    公开(公告)号：US20210097909A1

    公开(公告)日：2021-04-01

    申请号：US17003719

    申请日：2020-08-26

    Applicant: Apple Inc.

    Inventor： Daibashish Gangopadhyay ,  Fenghua Zheng

    IPC: G09G3/00

    Abstract: A system includes processing circuitry configured to determine a plurality of line-specific common voltage (Vcom) values for a plurality of common electrodes of an electronic display. Each of the plurality of line-specific Vcom values is associated with a line of pixels of a plurality of lines of pixels of the electronic display. Additionally, the processing circuitry is configured to cause the plurality of line-specific Vcom values to be provided to the plurality of lines of pixels.

    Content-based VCOM driving
    10.
    发明授权
    Content-based VCOM driving 有权

    公开(公告)号：US10395611B2

    公开(公告)日：2019-08-27

    申请号：US15701001

    申请日：2017-09-11

    Applicant: Apple Inc.

    Inventor： Fenghua Zheng ,  Howard H. Tang ,  James C. Aamold ,  Sandro H. Pintz ,  Chaohao Wang ,  Paolo Sacchetto

    IPC: G09G3/20 ,  G09G3/36

    Abstract: Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.

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