公开(公告)号：US10395611B2

公开(公告)日：2019-08-27

申请号：US15701001

申请日：2017-09-11

申请人： Apple Inc.

发明人： Fenghua Zheng ,  Howard H. Tang ,  James C. Aamold ,  Sandro H. Pintz ,  Chaohao Wang ,  Paolo Sacchetto

IPC分类号： G09G3/20 ,  G09G3/36

摘要： Methods and systems for compensating for VCOM variations include determining a voltage change in pixels between frames to be displayed on an electronic display. Based on the determined voltage change, VCOM variation is calculated based on coupling the VCOM to one or more data lines of the electronic display. VCOM compensation is determined and applied to offset for the VCOM variation. Using the VCOM offset, subsequent pixel content for the one or more pixels is written using the compensated VCOM.

公开(公告)号：US20180366078A1

公开(公告)日：2018-12-20

申请号：US16113132

申请日：2018-08-27

申请人： Apple Inc.

发明人： Chaohao Wang ,  Brijesh Tripathi ,  Christopher Philip Alan Tann ,  David S. Zalatimo ,  Guy Cote ,  Hao Nan ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz

IPC分类号： G09G3/36

摘要： An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

公开(公告)号：US10102815B2

公开(公告)日：2018-10-16

申请号：US15890517

申请日：2018-02-07

申请人： Apple Inc.

发明人： Chaohao Wang ,  Brijesh Tripathi ,  Christopher Philip Alan Tann ,  David S. Zalatimo ,  Guy Cote ,  Hao Nan ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz

IPC分类号： G09G3/36

摘要： An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

公开(公告)号：US09946101B2

公开(公告)日：2018-04-17

申请号：US14835366

申请日：2015-08-25

申请人： Apple Inc.

发明人： James E. C. Brown ,  Fenghua Zheng ,  Sandro H. Pintz

IPC分类号： G09G3/36 ,  G02F1/133

CPC分类号： G02F1/13306 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/0289

摘要： A method for operating a gate driver that is driving pixel transistors of a display panel, is described. An internal start pulse is produced in response to an external start pulse and in accordance with a system clock, wherein the internal start pulse is input to a first cell of a gate driver shift register whose outputs are coupled to level shifting output stages that are driving the rows of pixel transistors of the display panel. The produced internal start pulse was qualified by an output of a last cell of the gate driver shift register. Other embodiments are also described and claimed.

公开(公告)号：US20160300546A1

公开(公告)日：2016-10-13

申请号：US14855733

申请日：2015-09-16

申请人： Apple Inc.

发明人： Fenghua Zheng ,  Christopher P. Tann ,  David S. Zalatimo ,  James E. C. Brown ,  Sandro H. Pintz

IPC分类号： G09G5/00

CPC分类号： G09G3/2096 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2330/021

摘要： A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include gate driver integrated circuits. Each gate driver integrated circuit may have a shift register that supplies the gate line signals to the rows of pixels. The display driver circuitry supplies a clock signal to the gate driver integrated circuits. Each gate driver integrated circuit may have one or more clock trees that are selectively enable and disabled. Each gate driver integrated circuit may have a controller and a buffer that is controlled by a control signal from the controller. The buffer may be adjusted to supply or to not supply the clock signal to an associated clock tree in that gate driver integrated circuit.

摘要翻译： 显示器可以具有由显示驱动器电路控制的像素阵列。 栅极驱动器电路将栅极线信号提供给像素的行。 栅极驱动器电路可以包括栅极驱动器集成电路。 每个栅极驱动器集成电路可以具有将栅极线信号提供给像素行的移位寄存器。 显示驱动器电路将时钟信号提供给栅极驱动器集成电路。 每个栅极驱动器集成电路可以具有选择性地使能和禁止的一个或多个时钟树。 每个栅极驱动器集成电路可以具有由来自控制器的控制信号控制的控制器和缓冲器。 可以调整缓冲器以提供或不向该栅极驱动器集成电路中的相关联的时钟树提供时钟信号。

公开(公告)号：US20160277706A1

公开(公告)日：2016-09-22

申请号：US14659723

申请日：2015-03-17

申请人： APPLE INC.

发明人： Christopher P. Tann ,  Chaohao Wang ,  David S. Zalatimo ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz ,  Satish S. Iyengar

IPC分类号： H04N7/01 ,  G06F1/32 ,  G09G5/00

CPC分类号： H04N7/0127 ,  G06F1/3218 ,  G06F1/3265 ,  G09G5/001 ,  G09G2330/021 ,  H04N7/0115 ,  Y02D10/153

摘要： Systems and methods for controlling operation of an electronic display are provided. One embodiment describes an electronic display, which includes a display driver that writes image frames to pixels of the electronic display with a first refresh rate or a second refresh rate; and a timing controller that receives a plurality of image frames from an image source, in which the plurality of image frames are displayed on the electronic display to play video content; detects a cadence with which the plurality of image frames are received from the image source; and, based at least in part on the cadence of the plurality of image frames, instructs the display driver to write each of the plurality of image frames either as a single image frame at the first refresh rate or an image frame at the first refresh rate followed by a repeat of the image frame at the second refresh rate.

摘要翻译： 提供了一种用于控制电子显示器操作的系统和方法。 一个实施例描述了一种电子显示器，其包括以第一刷新率或第二刷新率将图像帧写入电子显示器的像素的显示驱动器; 以及定时控制器，其从图像源接收多个图像帧，其中所述多个图像帧在所述电子显示器上显示以播放视频内容; 从图像源检测接收到多个图像帧的节奏; 并且至少部分地基于多个图像帧的节奏，指示显示驱动器将多个图像帧中的每一个作为第一刷新率的单个图像帧或以第一刷新率的图像帧进行写入 随后以第二刷新率重复图像帧。

公开(公告)号：US20160260416A1

公开(公告)日：2016-09-08

申请号：US14636693

申请日：2015-03-03

申请人： APPLE INC.

发明人： Christopher P. Tann ,  David S. Zalatimo ,  Marc Albrecht ,  Sandro H. Pintz ,  Satish S. Iyengar

IPC分类号： G09G5/18

CPC分类号： G09G5/005 ,  G09G2340/0407 ,  G09G2340/0435 ,  H04N7/0127

摘要： One embodiment of the present disclosure describes an electronic display. The electronic display includes a display driver that write image frames to pixels of the electronic display with a first refresh rate or a second refresh rate, in which the second refresh rate is less than the first refresh rate. Additionally, the electronic display includes a timing controller that receives image frames from an image source, in which one or more of the image frames are configured to be displayed on the display panel to play video content; determines a capture rate of the video content based at least in part on a cadence with which the image frames are received, in which the capture rate describes a rate at which each of the one or more image frames was captured by an image sensor; and instructs the display driver to write the one or more of the image frames at the second refresh when the second refresh rate is an integer multiple of the capture rate.

摘要翻译： 本公开的一个实施例描述了电子显示器。 电子显示器包括显示驱动器，其以第一刷新率或第二刷新率将图像帧写入电子显示器的像素，其中第二刷新率小于第一刷新率。 此外，电子显示器包括定时控制器，其从图像源接收图像帧，其中一个或多个图像帧被配置为在显示面板上显示以播放视频内容; 至少部分地基于接收到图像帧的节奏来确定视频内容的捕获率，其中捕获速率描述一个或多个图像帧中的每一个被图像传感器捕获的速率; 并且当第二刷新率是捕获率的整数倍时，指示显示驱动器在第二次刷新时写入一个或多个图像帧。

公开(公告)号：US20150199292A1

公开(公告)日：2015-07-16

申请号：US14500944

申请日：2014-09-29

申请人： Apple Inc.

发明人： David W. Lum ,  Thomas J. Wilson ,  Paolo Sacchetto ,  Sandro H. Pintz ,  Fenghua Zheng

IPC分类号： G06F13/42 ,  G06F13/40

CPC分类号： G06F13/4221

摘要： A method for simplifying the host-to-display subsystem communications and consolidating the non-volatile memory requirements into a PMIC (power management integrated circuit) is disclosed. Hardware and software resource reduction in both the client devices (located in the display subsystem) and the host System on a Chip (SOC) can be realized with a novel PMIC design. The novel PMIC design achieves the resource reduction by providing for the following features: (1) Single-point communication, (2) Single-point notification, (3) Client device status storage, (4) Client device initialization from PMIC non-volatile memory, and (5) Subsystem calibration retrieval from PMIC non-volatile memory.

摘要翻译： 公开了一种用于简化主机到显示器子系统通信并将非易失性存储器需求整合到PMIC（电力管理集成电路）中的方法。 可以通过新颖的PMIC设计来实现客户端设备（位于显示子系统中）和主机片上系统（SOC）的硬件和软件资源减少。 新型PMIC设计通过提供以下特点实现资源减少：（1）单点通信，（2）单点通知，（3）客户端设备状态存储，（4）PMIC非易失性的客户端设备初始化 存储器和（5）PMIC非易失性存储器的子系统校准检索。

公开(公告)号：US09947277B2

公开(公告)日：2018-04-17

申请号：US14717557

申请日：2015-05-20

申请人： APPLE INC.

发明人： Christopher P. Tann ,  Sandro H. Pintz ,  Satish S. Iyengar ,  David S. Zalatimo

IPC分类号： G09G3/36 ,  G09G5/12 ,  G06F1/32 ,  G09G5/00

CPC分类号： G09G3/3618 ,  G06F1/3218 ,  G06F1/3265 ,  G09G3/3611 ,  G09G5/001 ,  G09G5/006 ,  G09G5/12 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2360/18

摘要： Methods and devices for reducing the power consumption of a frame buffer and timing controller of an electronic display are provided. By way of example, a method of operating an electronic display includes receiving image data from a processor of the electronic display, storing the image data to a buffer of the electronic display, reading the image data from the buffer to supply the image data to a column driver of the electronic display, determining whether an amount of image data stored in buffer is less than a threshold, and switching from reading the image data from the buffer to reading the image data directly from the processor when the amount of image data stored in buffer is less than the threshold.

公开(公告)号：US09922608B2

公开(公告)日：2018-03-20

申请号：US14722620

申请日：2015-05-27

申请人： Apple Inc.

发明人： Chaohao Wang ,  Brijesh Tripathi ,  Christopher Philip Alan Tann ,  David S. Zalatimo ,  Guy Cote ,  Hao Nan ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G2320/0204 ,  G09G2320/0247 ,  G09G2320/0257 ,  G09G2320/046 ,  G09G2340/0435 ,  G09G2360/16

摘要： An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.