公开(公告)号：US11686571B2

公开(公告)日：2023-06-27

申请号：US17465753

申请日：2021-09-02

Applicant: Applied Materials Israel Ltd.

Inventor： Roman Kris ,  Ilan Ben-Harush ,  Rafael Bistritzer ,  Vadim Vereschagin ,  Elad Sommer ,  Grigory Klebanov ,  Arundeepth Thamarassery ,  Jannelle Anna Geva ,  Gal Daniel Gutterman ,  Einat Frishman ,  Sahar Levin

IPC: G01B11/24 ,  G01B9/02 ,  G06T7/00

CPC classification number: G01B9/02043 ,  G01B9/02084 ,  G01B11/24 ,  G06T7/001 ,  G06T2207/30148

Abstract: There is provided a system and method of a method of detecting a local shape deviation of a structural element in a semiconductor specimen, comprising: obtaining an image comprising an image representation of the structural element; extracting, from the image, an actual contour of the image representation; estimating a reference contour of the image representation indicative of a standard shape of the structural element, wherein the reference contour is estimated based on a Fourier descriptor representative of the reference contour, the Fourier descriptor being estimated using an optimization method based on a loss function specifically selected to be insensitive to local shape deviation of the actual contour; and performing one or more measurements representative of one or more differences between the actual contour and the reference contour, the measurements indicative of whether a local shape deviation is present in the structural element.

公开(公告)号：US11651509B2

公开(公告)日：2023-05-16

申请号：US17281948

申请日：2019-10-31

Applicant: APPLIED MATERIALS ISRAEL LTD.

Inventor： Roman Kris ,  Roi Meir ,  Sahar Levin ,  Ishai Schwarzband ,  Grigory Klebanov ,  Shimon Levi ,  Efrat Noifeld ,  Hiroshi Miroku ,  Taku Yoshizawa ,  Kasturi Saha ,  Sharon Duvdevani-Bar ,  Vadim Vereschagin

IPC: G06T7/00 ,  G06T7/13 ,  G06T7/194 ,  G06T7/60 ,  G06V10/44 ,  G06V20/69 ,  G01N23/225

CPC classification number: G06T7/0004 ,  G01N23/225 ,  G06T7/13 ,  G06T7/194 ,  G06T7/60 ,  G06V10/44 ,  G06V20/695 ,  G01N2223/401 ,  G06T2207/10061 ,  G06T2207/30148

Abstract: A method for process control of a semiconductor structure fabricated by a series of fabrication steps, the method comprising obtaining an image of the semiconductor structure indicative of at least two individual fabrication steps; wherein the image is generated by scanning the semiconductor structure with a charged particle beam and collecting signals emanating from the semiconductor structure; and processing, by a hardware processor, the image to determining a parameter of the semiconductor structure, wherein processing includes measuring step/s from among the fabrication steps as an individual feature.

公开(公告)号：US11455715B2

公开(公告)日：2022-09-27

申请号：US17177119

申请日：2021-02-16

Applicant: Applied Materials Israel Ltd.

Inventor： Jitendra Pradipkumar Chaudhary ,  Roman Kris ,  Ran Alkoken ,  Sahar Levin ,  Chih-Chieh Chang ,  Einat Frishman

IPC: G06T7/12 ,  G06T7/00 ,  H01L29/66 ,  G06T7/13

Abstract: There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level (GL) profile indicative of GL distribution of the image; detecting edges of the at least one HK fin; determining two inflection points of the GL profile within an area of interest in the image; performing a critical dimension (CD) measurement between the two inflection points; determining whether to apply correction to the CD measurement based on a GL ratio indicative of a relative position between the epitaxy and the at least one HK fin; and applying correction to the CD measurement upon the GL ratio meeting a predetermined criterion.