公开(公告)号：US12184180B2

公开(公告)日：2024-12-31

申请号：US17984221

申请日：2022-11-09

Applicant: ASUSTeK COMPUTER INC.

Inventor： Wei Kao ,  Ming-Ting Tsai ,  Hsiang-Jui Hung ,  Hsi-Ho Hsu ,  Chen-Hao Yu ,  Chun-San Lin ,  Wei-Gen Chung

IPC: H02M1/088 ,  H02M1/14 ,  H02M3/158

Abstract: A power supply phase doubling system includes a pulse width modulation (PWM) controller and first and second phase doubling chips. The PWM controller outputs a PWM signal. The first phase doubling chip is operated at a power supply voltage and has a first PWM output pin to generate a first control signal and a second control signal according to the PWM signal, and generates a first output signal according to the first control signal. The second phase doubling chip is operated at the power supply voltage, has a second PWM output pin, and is configured to generate a second output signal according to the second control signal. The first and second phase doubling chips are respectively switched between a master mode and a slave mode according to a voltage level of the first PWM output pin and a voltage level of the second PWM output pin.

公开(公告)号：US20240061018A1

公开(公告)日：2024-02-22

申请号：US17969697

申请日：2022-10-20

Applicant: ASUSTeK COMPUTER INC.

Inventor： Wei-Gen Chung ,  Ming-Ting Tsai ,  Hsi-Ho Hsu ,  Chun-San Lin ,  Wei Kao ,  Chen-Hao Yu ,  Hsiang-Jui Hung

IPC: G01R15/04 ,  H03K17/687 ,  H03F3/45 ,  H02H3/20

CPC classification number: G01R15/04 ,  H03K17/687 ,  H03F3/45071 ,  H02H3/20

Abstract: A voltage detection device is provided. The voltage detection device includes a first voltage divider circuit, a comparison circuit, and a second voltage divider circuit. The first voltage divider circuit is configured to receive an input voltage and output a comparison voltage according to the input voltage. The comparison circuit is configured to receive the comparison voltage to compare the comparison voltage with a reference voltage and determine whether to change a trigger signal according to a comparison result. The second voltage divider circuit is configured to receive the input voltage. When the input voltage is greater than or equal to a predetermined voltage value, the second voltage divider circuit and the first voltage dividing circuit form a parallel structure to pull down the comparison voltage.

公开(公告)号：US12174222B2

公开(公告)日：2024-12-24

申请号：US17969697

申请日：2022-10-20

Applicant: ASUSTeK COMPUTER INC.

Inventor： Wei-Gen Chung ,  Ming-Ting Tsai ,  Hsi-Ho Hsu ,  Chun-San Lin ,  Wei Kao ,  Chen-Hao Yu ,  Hsiang-Jui Hung

IPC: G01R15/04 ,  H02H3/20 ,  H03F3/45 ,  H03K17/687

Abstract: A voltage detection device is provided. The voltage detection device includes a first voltage divider circuit, a comparison circuit, and a second voltage divider circuit. The first voltage divider circuit is configured to receive an input voltage and output a comparison voltage according to the input voltage. The comparison circuit is configured to receive the comparison voltage to compare the comparison voltage with a reference voltage and determine whether to change a trigger signal according to a comparison result. The second voltage divider circuit is configured to receive the input voltage. When the input voltage is greater than or equal to a predetermined voltage value, the second voltage divider circuit and the first voltage dividing circuit form a parallel structure to pull down the comparison voltage.

公开(公告)号：US20230336081A1

公开(公告)日：2023-10-19

申请号：US17984221

申请日：2022-11-09

Applicant: ASUSTeK COMPUTER INC.

Inventor： Wei Kao ,  Ming-Ting Tsai ,  Hsiang-Jui Hung ,  Hsi-Ho Hsu ,  Chen-Hao Yu ,  Chun-San Lin ,  Wei-Gen Chung

IPC: H02M3/158 ,  H02M1/14 ,  H02M1/088

CPC classification number: H02M3/1586 ,  H02M1/14 ,  H02M1/088

Abstract: A power supply phase doubling system includes a pulse width modulation (PWM) controller and first and second phase doubling chips. The PWM controller outputs a PWM signal. The first phase doubling chip is operated at a power supply voltage and has a first PWM output pin to generate a first control signal and a second control signal according to the PWM signal, and generates a first output signal according to the first control signal. The second phase doubling chip is operated at the power supply voltage, has a second PWM output pin, and is configured to generate a second output signal according to the second control signal. The first and second phase doubling chips are respectively switched between a master mode and a slave mode according to a voltage level of the first PWM output pin and a voltage level of the second PWM output pin.