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公开(公告)号:US20190384722A1
公开(公告)日:2019-12-19
申请号:US16007027
申请日:2018-06-13
Applicant: Advanced Micro Devices, Inc.
Inventor: Arkaprava Basu , Michael LeBeane , Eric Van Tassell
IPC: G06F12/1036 , G06F12/1009 , G06F9/50 , G06F9/48 , G06F13/16 , G06F13/22
Abstract: A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.
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公开(公告)号:US11144473B2
公开(公告)日:2021-10-12
申请号:US16007027
申请日:2018-06-13
Applicant: Advanced Micro Devices, Inc.
Inventor: Arkaprava Basu , Michael LeBeane , Eric Van Tassell
IPC: G06F12/1036 , G06F12/1009 , G06F9/50 , G06F9/48 , G06F13/16 , G06F13/22
Abstract: A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.
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