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公开(公告)号：US20170300101A1
公开(公告)日：2017-10-19
申请号：US15099321
申请日：2016-04-14
Applicant: Advanced Micro Devices, Inc.
Inventor： Alexander J. Branover , Ashish Jain , Mom Eng Ng
Abstract: A power management module of a processor places a compute unit in a low power mode (e.g., an idle mode) in response to identifying that the compute unit is expected to experience little to no processing activity for a threshold amount of time. In response to receiving an indication from a message controller that a message is targeted to the compute unit, the power management module selects a different compute unit that is presently in an active power mode and provides the message to the selected compute unit for processing. The compute unit can be selected based on any of a variety of criteria, such as the compute unit being in a stall condition, an indication from a performance monitor that the compute unit is executing a relatively inefficient program thread, and the like.
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