公开(公告)号：US11239178B2

公开(公告)日：2022-02-01

申请号：US16694847

申请日：2019-11-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan Liu ,  Han-Chee Yen ,  Kuo-Hsien Liao ,  Alex Chi-Hong Chan ,  Christophe Zinck

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498

Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.

公开(公告)号：US12148980B2

公开(公告)日：2024-11-19

申请号：US17351056

申请日：2021-06-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Christophe Zinck

IPC: H01Q1/22 ,  H01L23/31 ,  H01L23/66 ,  H01P3/08

Abstract: The present disclosure provides a semiconductor device package including a substrate, a waveguide component, and an antenna pattern. The substrate includes a feeding element. The waveguide component is disposed over the substrate. The antenna pattern is disposed over the substrate. The waveguide component is substantially aligned with the feeding element and the antenna pattern.

公开(公告)号：US20200176394A1

公开(公告)日：2020-06-04

申请号：US16694847

申请日：2019-11-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan LIU ,  Han-Chee YEN ,  Kuo-Hsien LIAO ,  Alex Chi-Hong CHAN ,  Christophe Zinck

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.