公开(公告)号：US20230299462A1

公开(公告)日：2023-09-21

申请号：US18203632

申请日：2023-05-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN

IPC: H01Q1/22 ,  H01L23/66 ,  H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01Q9/04

CPC classification number: H01Q1/2283 ,  H01L23/66 ,  H01L25/16 ,  H01L23/3128 ,  H01L24/97 ,  H01Q9/0407 ,  H01L2223/6677 ,  H01L2924/15787 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L21/561

Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.

公开(公告)号：US20190319337A1

公开(公告)日：2019-10-17

申请号：US15951091

申请日：2018-04-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN

IPC: H01Q1/22 ,  H01L23/31 ,  H01L23/14 ,  H05K1/02 ,  H01Q1/38

Abstract: A semiconductor device package includes a circuit layer, an antenna structure, a first encapsulant and a reflector. The circuit layer has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The antenna structure is disposed within the circuit layer. The first encapsulant is disposed on the first surface of the circuit layer, the first encapsulant having a surface. The reflector is disposed on the first encapsulant. The third surface of the circuit layer is substantially coplanar with the surface of the first encapsulant.

公开(公告)号：US20180083341A1

公开(公告)日：2018-03-22

申请号：US15826543

申请日：2017-11-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN

IPC: H01Q1/22 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16 ,  H01Q9/04 ,  H01L21/56

CPC classification number: H01Q1/2283 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/66 ,  H01L24/97 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01Q9/0407 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85

Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.

公开(公告)号：US20240194609A1

公开(公告)日：2024-06-13

申请号：US18076417

申请日：2022-12-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN ,  Ying-Nan LIU ,  Min-Yao CHENG ,  Eelco BERGMAN

IPC: H01L23/538 ,  G02B6/12 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L25/16 ,  H01L25/18

CPC classification number: H01L23/5389 ,  G02B6/12004 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/5383 ,  H01L24/19 ,  H01L24/20 ,  H01L25/167 ,  H01L25/18 ,  H01L25/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/2101 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: An electronic device is disclosed. The electronic device includes a first component, a second component, and a first bridge component configured to electrically connect the first component with the second component. The first component is configured to transmit a first signal downwardly without passing the first bridge component and the second component is configured to transmit/receive a second signal to/from outside of the electronic device. A transmission speed of the second signal is higher than a transmission speed of the first signal.

公开(公告)号：US20230400648A1

公开(公告)日：2023-12-14

申请号：US17838099

申请日：2022-06-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN ,  Min-Yao CHENG ,  Hung-Yi LIN

IPC: G02B6/42 ,  H01L25/16

CPC classification number: G02B6/4246 ,  H01L25/167 ,  G02B6/428

Abstract: The present disclosure provides an electronic package. The electronic package includes a photonic component including a first input/output (I/O) port and a second I/O port both at a side of the photonic component. The electronic package also includes a connector disposed adjacent to the side of the photonic component and configured to guide a first light carrying medium to be optically coupled with at least one of the first I/O port and second I/O port of the photonic component.

公开(公告)号：US20210296278A1

公开(公告)日：2021-09-23

申请号：US16825725

申请日：2020-03-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Han-Chee YEN ,  Ying-Nan LIU ,  Min-Yao CHENG

IPC: H01L23/00

Abstract: A semiconductor device package is provided. The semiconductor device package includes providing a first substrate, a computing unit and a power module. The first substrate has a first surface and a second surface opposite to the first surface. The computing unit is adjacent to the first surface. The computing unit includes a semiconductor die. The power module is adjacent to the second surface. The power module includes a power element and a passive element. Each of the semiconductor die, the power element, and the passive element is vertically arranged with respect to each other, and the passive elements are assembled between the semiconductor die and the power element.

公开(公告)号：US20200176394A1

公开(公告)日：2020-06-04

申请号：US16694847

申请日：2019-11-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan LIU ,  Han-Chee YEN ,  Kuo-Hsien LIAO ,  Alex Chi-Hong CHAN ,  Christophe Zinck

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.