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公开(公告)号:US11837686B2
公开(公告)日:2023-12-05
申请号:US16706527
申请日:2019-12-06
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu , Kuo-Hsien Liao , Alex Chi-Hong Chan , Fuh-Yuh Shih
CPC classification number: H01L33/60 , H01L25/0753 , H01L33/0095 , H01L33/52 , H01L33/62 , H01L2933/005 , H01L2933/0058
Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.
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公开(公告)号:US12205829B2
公开(公告)日:2025-01-21
申请号:US17164402
申请日:2021-02-01
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu
Abstract: A semiconductor device package includes a substrate and a monolithic encapsulant. The substrate has a first surface, a second surface opposite to the first surface and a plurality of lateral surfaces extending between the first surface and the second surface. The substrate defines a first opening and a second opening that extend between the first surface and the second surface and respectively expose the plurality of lateral surfaces. The monolithic encapsulant includes a first portion disposed on the first surface of the substrate, a second portion disposed on the second surface of the substrate and a third portion disposed within the first opening and the second opening.
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公开(公告)号:US10930802B2
公开(公告)日:2021-02-23
申请号:US15970536
申请日:2018-05-03
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu
IPC: H01L31/0203 , H01L31/02 , H01L31/18 , H01L31/173 , H01L31/0232 , H01L25/16 , H01L23/31 , H01L21/56
Abstract: A semiconductor device package includes a substrate, a first encapsulant and a second encapsulant. The substrate has an optical region and a surface-mount technology (SMT) device region. The first encapsulant includes a first portion disposed on the optical region and covers the optical region and a second portion disposed on the SMT device region and covers the SMT device region. The second encapsulant is disposed on the substrate and covers at least a portion of the second portion of the first encapsulant and a portion of the first portion of the first encapsulant.
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公开(公告)号:US10910233B2
公开(公告)日:2021-02-02
申请号:US15951093
申请日:2018-04-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu
Abstract: A semiconductor device package includes a substrate and a monolithic encapsulant. The substrate has a first surface, a second surface opposite to the first surface and a plurality of lateral surfaces extending between the first surface and the second surface. The substrate defines a first opening and a second opening that extend between the first surface and the second surface and respectively expose the plurality of lateral surfaces. The monolithic encapsulant includes a first portion disposed on the first surface of the substrate, a second portion disposed on the second surface of the substrate and a third portion disposed within the first opening and the second opening.
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公开(公告)号:US11557684B2
公开(公告)日:2023-01-17
申请号:US17181945
申请日:2021-02-22
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu
IPC: H01L31/0203 , H01L31/02 , H01L31/18 , H01L31/173 , H01L31/0232 , H01L25/16 , H01L23/31 , H01L21/56
Abstract: A semiconductor device package includes a substrate, a first encapsulant and a second encapsulant. The substrate has an optical region and a surface-mount technology (SMT) device region. The first encapsulant includes a first portion disposed on the optical region and covers the optical region and a second portion disposed on the SMT device region and covers the SMT device region. The second encapsulant is disposed on the substrate and covers at least a portion of the second portion of the first encapsulant and a portion of the first portion of the first encapsulant.
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公开(公告)号:US11239178B2
公开(公告)日:2022-02-01
申请号:US16694847
申请日:2019-11-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu , Han-Chee Yen , Kuo-Hsien Liao , Alex Chi-Hong Chan , Christophe Zinck
IPC: H01L23/552 , H01L23/00 , H01L23/31 , H01L21/48 , H01L21/56 , H01L23/498
Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.
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公开(公告)号:US12009312B2
公开(公告)日:2024-06-11
申请号:US17483720
申请日:2021-09-23
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chanyuan Liu , Kuo-Hsien Liao , Yu-Hsiang Sun
IPC: H01L23/552 , H01L23/31 , H01L23/498
CPC classification number: H01L23/552 , H01L23/3121 , H01L23/49811
Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a substrate having a first face and an opposing second face, wherein the first face is mounted with a first semiconductor component and a plurality of connectors; and a first shielding member covering the first semiconductor component and a first group of the plurality of connectors, while exposing a second group of the plurality of connectors.
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