公开(公告)号：US20150130039A1

公开(公告)日：2015-05-14

申请号：US14372015

申请日：2013-06-18

Applicant: Agency for Science, Technology and Research

Inventor： Vivek Chidambaram ,  Ling Xie ,  Ranganathan Nagarajan ,  Bangtao Chen ,  Beng Yeung Ho

IPC: H01L23/26 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/26 ,  B81B7/0038 ,  B81C1/00285 ,  C22C14/00 ,  C22C19/03 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a layer arrangement and a wafer level package comprising the layer arrangement, and in particular, the layer arrangement comprises a getter layer and further comprises a sacrificial layer. The wafer level package may be used in microelectromechanical systems (MEMS) packaging at a vacuum level of about 10 mTorr or less such as close to 1 mTorr (i.e. MEMS vacuum packaging).

Abstract translation: 本发明涉及一种层布置和包括层布置的晶片级封装，并且具体地，该层布置包括吸气剂层并且还包括牺牲层。 晶片级封装可以在大约10mTorr或更小的真空度，例如接近1mTorr（即MEMS真空封装）的微电子机械系统（MEMS）封装中使用。

公开(公告)号：US09240362B2

公开(公告)日：2016-01-19

申请号：US14372015

申请日：2013-06-18

Applicant: Agency for Science, Technology and Research

Inventor： Vivek Chidambaram ,  Ling Xie ,  Ranganathan Nagarajan ,  Bangtao Chen ,  Beng Yeung Ho

IPC: H01L23/20 ,  H01L23/26 ,  C22C14/00 ,  C22C19/03 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/26 ,  B81B7/0038 ,  B81C1/00285 ,  C22C14/00 ,  C22C19/03 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a layer arrangement and a wafer level package comprising the layer arrangement, and in particular, the layer arrangement comprises a getter layer and further comprises a sacrificial layer. The wafer level package may be used in microelectromechanical systems (MEMS) packaging at a vacuum level of about 10 mTorr or less such as close to 1 mTorr (i.e. MEMS vacuum packaging).

Abstract translation: 本发明涉及一种层布置和包括层布置的晶片级封装，并且具体地，该层布置包括吸气剂层并且还包括牺牲层。 晶片级封装可以在大约10mTorr或更小的真空度，例如接近1mTorr（即MEMS真空封装）的微电子机械系统（MEMS）封装中使用。