摘要:
The excitation overcurrent detection unit for the doubly-fed electric machine is provided with a function to determine an excitation current magnitude relationship among three phases. The firing pulse is held to on-state or off-state to cause the largest-current phase and the second-largest-current phase to charge the DC capacitor by the operation of diodes. The conduction ratio of the third-largest-current phase or minimum current phase is controlled according to the detected current value to protect against a possible short-circuit across the DC capacitor. When the voltage of the DC capacitor exceeds a preset value, the voltage is suppressed by operating active or passive power devices.
摘要:
The excitation overcurrent detection unit for the doubly-fed electric machine is provided with a function to determine an excitation current magnitude relationship among three phases. The firing pulse is held to on-state or off-state to cause the largest-current phase and the second-largest-current phase to charge the DC capacitor by the operation of diodes. The conduction ratio of the third-largest-current phase or minimum current phase is controlled according to the detected current value to protect against a possible short-circuit across the DC capacitor. When the voltage of the DC capacitor exceeds a preset value, the voltage is suppressed by operating active or passive power devices.
摘要:
A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要:
A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要:
A power converter system includes: a circuit breaker having one terminal connected to a power system and another terminal connected to a load; a transformer for interconnection; a power converter; and a controller for controlling the power converter, wherein, during a return to grid connected operation, the power converter is controlled such that the phase of an output voltage of the power converter matches the phase of the system voltage, and the circuit breaker is closed, so as to prevent an overcurrent during a changeover from the self commutated operation to the grid connected operation of the power converter.
摘要:
The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
摘要:
The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
摘要:
In an electric drive system for a vehicle, an alternator is driven by an engine to generate electric power which is used to drive a motor to generate a driving force. During a retardation of the vehicle, the motor is operated as an alternator to convert kinetic energy to electric energy which is used to retard the vehicle. A retard resistor is provided for absorbing electric energy generated during the retardation state. The retard resistor is cooled down by an AC blower.
摘要:
A failure is detected immediately and certainly, and continuation of processing in an unstable state is prevented. A first error detection code is generated from first information which is output as a result of execution of a predetermined program conducted by a first processor. A second error detection code is generated from second information which is output as a result of execution of the program conducted by a second processor which is configured so as to output the same computation result as that of the first processor. It is detected whether the first information is the same as the second information, and it is detected whether the first error detection code is the same as the second error detection code. Writing the first information or the second information into a main memory is controlled on the basis of a result of the detection.
摘要:
In a system to which a fluctuating load is connected, compensating for fluctuation in voltage harmonics at the load connecting point and fluctuation in system current harmonics has been difficult for a power converting device connected in parallel with the load. To resolve the problem, a power converting device connected in parallel with a fluctuating load includes: a Fourier series expansion unit which executes Fourier series expansion to load current by use of a reference sine wave in sync with a system and thereby outputs Fourier coefficients; and a fundamental component calculating unit which calculates a positive phase active fundamental component of the load current from the Fourier coefficients. A current instruction of the power converting device is generated by subtracting the fundamental current from the load current. With the current instruction, the fluctuations in system current harmonics and in voltage harmonics at the connecting point can be compensated for.