摘要:
The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
摘要:
The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
摘要:
A failure is detected immediately and certainly, and continuation of processing in an unstable state is prevented. A first error detection code is generated from first information which is output as a result of execution of a predetermined program conducted by a first processor. A second error detection code is generated from second information which is output as a result of execution of the program conducted by a second processor which is configured so as to output the same computation result as that of the first processor. It is detected whether the first information is the same as the second information, and it is detected whether the first error detection code is the same as the second error detection code. Writing the first information or the second information into a main memory is controlled on the basis of a result of the detection.
摘要:
A failure is detected immediately and certainly, and continuation of processing in an unstable state is prevented. A first error detection code is generated from first information which is output as a result of execution of a predetermined program conducted by a first processor. A second error detection code is generated from second information which is output as a result of execution of the program conducted by a second processor which is configured so as to output the same computation result as that of the first processor. It is detected whether the first information is the same as the second information, and it is detected whether the first error detection code is the same as the second error detection code. Writing the first information or the second information into a main memory is controlled on the basis of a result of the detection.
摘要:
The excitation overcurrent detection unit for the doubly-fed electric machine is provided with a function to determine an excitation current magnitude relationship among three phases. The firing pulse is held to on-state or off-state to cause the largest-current phase and the second-largest-current phase to charge the DC capacitor by the operation of diodes. The conduction ratio of the third-largest-current phase or minimum current phase is controlled according to the detected current value to protect against a possible short-circuit across the DC capacitor. When the voltage of the DC capacitor exceeds a preset value, the voltage is suppressed by operating active or passive power devices.
摘要:
A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要:
The excitation overcurrent detection unit for the doubly-fed electric machine is provided with a function to determine an excitation current magnitude relationship among three phases. The firing pulse is held to on-state or off-state to cause the largest-current phase and the second-largest-current phase to charge the DC capacitor by the operation of diodes. The conduction ratio of the third-largest-current phase or minimum current phase is controlled according to the detected current value to protect against a possible short-circuit across the DC capacitor. When the voltage of the DC capacitor exceeds a preset value, the voltage is suppressed by operating active or passive power devices.
摘要:
A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要:
A fault diagnosis apparatus and method capable of simultaneously detecting the fault of a multiplexer and the fault of an A/D converter and isolating and identifying causes of these faults, the multiplexer and the A/D converter being used in a multi-channel analog input/output circuit. Test-voltage values are inputted from a diagnosis-voltage input unit into the multiplexer and the A/D converter constituting an analog-signal conversion unit, the multiplexer having plural channels, the A/D converter converting outputs from the multiplexer into digital signals, the test-voltage values being different from each other for each channel of the multiplexer. Comparisons are made between the digital voltage values and the test-voltage values inputted, the digital voltage values being outputted for each channel of the multiplexer. From this comparison result, it is judged whether the multiplexer is at fault or the A/D converter is at fault.
摘要:
A fault diagnosis apparatus and method capable of simultaneously detecting the fault of a multiplexer and the fault of an A/D converter and isolating and identifying causes of these faults, the multiplexer and the A/D converter being used in a multi-channel analog input/output circuit. Test-voltage values are inputted from a diagnosis-voltage input unit into the multiplexer and the A/D converter constituting an analog-signal conversion unit, the multiplexer having plural channels, the A/D converter converting outputs from the multiplexer into digital signals, the test-voltage values being different from each other for each channel of the multiplexer. Comparisons are made between the digital voltage values and the test-voltage values inputted, the digital voltage values being outputted for each channel of the multiplexer. From this comparison result, it is judged whether the multiplexer is at fault or the A/D converter is at fault.