Heatsink moldlocks
    1.
    发明授权
    Heatsink moldlocks 有权
    散热模具

    公开(公告)号:US08310042B2

    公开(公告)日:2012-11-13

    申请号:US11424183

    申请日:2006-06-14

    IPC分类号: H01L23/10 H01L23/34

    摘要: A system of mold locks (28, 30) is formed on a heatsink (2) of a packaged semiconductor to prevent/mitigate delamination. The mold locks (4, 12) anchor a plastic mold compound (34) that forms the protective cover for the packaged semiconductor die. The mold locks (4, 12) are miniaturized to allow the positioning of them within the flag portion of the heatsink (2) and leadframe (24) such that a semiconductor die can be anchored above the mold locks (4, 12) formed within the flag portion of the heatsink/lead frame (2, 24). The miniaturized size of the said moldlocks (4, 12 do not detract from the purpose of the die attach solder (36).

    摘要翻译: 在封装半导体的散热器(2)上形成模具锁(28,30)的系统,以防止/减轻分层。 模具锁(4,12)锚固形成用于封装的半导体管芯的保护盖的塑料模具化合物(34)。 模具锁(4,12)被小型化以允许它们定位在散热器(2)和引线框架(24)的标志部分内,使得半导体管芯可以锚固在形成在其内的模具锁(4,12)的上方 散热器/引线框架的标志部分(2,24)。 所述模具锁(4,12)的小型化尺寸不会降低芯片附着焊料(36)的目的。

    Method of making a mount for electronic devices
    2.
    发明授权
    Method of making a mount for electronic devices 有权
    电子设备安装方法

    公开(公告)号:US06996897B2

    公开(公告)日:2006-02-14

    申请号:US10208867

    申请日:2002-07-31

    IPC分类号: B23P15/00

    摘要: method for making a mount for at least two electronic devices forming a first mounting surface (210) from a material (240), and forming a second mounting surface (220) from the material (240). The first mounting surface (210) is connected to, but spaced from, the second mounting surface (220) by a mounting surface distance (250). The method further comprises reducing the mounting surface distance (250).

    摘要翻译: 用于制造用于至少两个电子器件的安装件的方法,所述至少两个电子器件从材料(240)形成第一安装表面(210),以及从所述材料(240)形成第二安装表面(220)。 第一安装表面(210)通过安装表面距离(250)连接到第二安装表面(220)但与第二安装表面(220)隔开。 该方法还包括减小安装表面距离(250)。

    Miniature moldlocks for heatsink or flag for an overmolded plastic package
    3.
    发明授权
    Miniature moldlocks for heatsink or flag for an overmolded plastic package 有权
    微型模具用于散热器或标志,用于包覆成型塑料包装

    公开(公告)号:US07091602B2

    公开(公告)日:2006-08-15

    申请号:US10318699

    申请日:2002-12-13

    IPC分类号: H01L23/10 H01L23/34

    摘要: A system of mold locks (28, 30) is formed on a heatsink (2) of a packaged semiconductor to prevent/mitigate delamination. The mold locks (4, 12) anchor a plastic mold compound (34) that forms the protective cover for the packaged semiconductor die. The mold locks (4, 12) are miniaturized to allow the positioning of them within the flag portion of the heatsink (2) and leadframe (24) such that a semiconductor die can be anchored above the mold locks (4, 12) formed within the flag portion of the heatsink/lead frame (2, 24). The miniaturized size of the said moldlocks (4, 12 do not detract from the purpose of the die attach solder (36).

    摘要翻译: 在封装半导体的散热器(2)上形成模具锁(28,30)的系统,以防止/减轻分层。 模具锁(4,12)锚固形成用于封装的半导体管芯的保护盖的塑料模具化合物(34)。 模具锁(4,12)被小型化以允许它们定位在散热器(2)和引线框架(24)的标志部分内,使得半导体管芯可以锚固在形成在其内的模具锁(4,12)的上方 散热器/引线框架的标志部分(2,24)。 所述模具锁(4,12)的小型化尺寸不会降低芯片附着焊料(36)的目的。

    Package for mating with a semiconductor die
    4.
    发明授权
    Package for mating with a semiconductor die 失效
    用于与半导体管芯配合的封装

    公开(公告)号:US5587605A

    公开(公告)日:1996-12-24

    申请号:US473833

    申请日:1995-06-07

    摘要: An interconnect package (35) for interconnecting electrical system components. A first leadframe (10) having leads (11) is encapsulated within a molding compound forming a first section (36) of the interconnect package (35). The first section (36) optionally includes channels (54). A second leadframe (20) having leads (22, 23) is encapsulated within a molding compound forming a second section (37) of the interconnect package (35). The first and second sections (36 and 37, respectively) are coupled together with an adhesive material (43). An end (44) is removed from the interconnect package (35) forming an edge (50). A semiconductor chip (51) is coupled to the edge (50).

    摘要翻译: 一种用于互连电气系统组件的互连封装(35)。 具有引线(11)的第一引线框架(10)被封装在形成互连封装(35)的第一部分(36)的模制化合物内。 第一部分(36)可选地包括通道(54)。 具有引线(22,23)的第二引线框架(20)被封装在形成互连封装(35)的第二部分(37)的模制化合物内。 第一和第二部分(36和37分别)用粘合剂材料(43)联接在一起。 从形成边缘(50)的互连封装(35)移除端(44)。 半导体芯片(51)连接到边缘(50)。

    Process for manufacturing a package for mating with a bare semiconductor
die
    5.
    发明授权
    Process for manufacturing a package for mating with a bare semiconductor die 失效
    用于制造与裸半导体管芯配合的封装的工艺

    公开(公告)号:US5589402A

    公开(公告)日:1996-12-31

    申请号:US550416

    申请日:1995-10-30

    摘要: A method for interconnecting electrical system components. A leadframe (10) having leads (11) is encapsulated within a molding compound to form a first section (36) of the interconnect package (35). The first section (36) optionally includes channels (54). A leadframe (20) having leads (22, 23) is encapsulated within a molding compound to form a second section (37) of the interconnect package (35). The first and second sections (36 and 37, respectively) are coupled together with an adhesive material (43). An end (44) is removed from the interconnect package (35) forming an edge (50). A bare semiconductor chip (51) is coupled to the edge (50).

    摘要翻译: 一种用于互连电气系统部件的方法。 具有引线(11)的引线框架(10)被封装在模制化合物内以形成互连封装(35)的第一部分(36)。 第一部分(36)可选地包括通道(54)。 具有引线(22,23)的引线框架(20)被封装在模制化合物内以形成互连封装(35)的第二部分(37)。 第一和第二部分(36和37分别)用粘合剂材料(43)联接在一起。 从形成边缘(50)的互连封装(35)移除端(44)。 裸半导体芯片(51)耦合到边缘(50)。

    Leadframe assembly for conducting thermal energy from a semiconductor
die disposed in a package
    6.
    发明授权
    Leadframe assembly for conducting thermal energy from a semiconductor die disposed in a package 失效
    用于从设置在封装中的半导体管芯传导热能的引线框架组件

    公开(公告)号:US5886396A

    公开(公告)日:1999-03-23

    申请号:US463112

    申请日:1995-06-05

    IPC分类号: H01L23/433 H01L23/495

    摘要: A semiconductor die (32) is disposed on a heat sink (22) in an electronic package (10). During assembly, a leadframe (20) is connected to the heat sink (22) by down-set tabs (14, 28), which are offset from the heat sink (22) and disposed within the boundary (19) in which the final package (10) will be molded. Individual heat sinks (22) are pre-out prior to molding the final packages (10). In one roach, pins (36) are used to connect down-set tabs (14, 28) to heat sink (22).

    摘要翻译: 半导体管芯(32)设置在电子封装(10)中的散热器(22)上。 在组装期间,引线框架(20)通过从散热器(22)偏移并设置在边界(19)内的下置突片(14,28)连接到散热器(22),其中最终 包装(10)将被模制。 单个散热器(22)在模制最终包装(10)之前是先出去的。 在一个蟑螂中,销(36)用于将下置的接片(14,28)连接到散热器(22)。

    Lead frame assembly for surface mount integrated circuit power package
    7.
    发明授权
    Lead frame assembly for surface mount integrated circuit power package 失效
    用于表面贴装集成电路电源封装的引线框架组件

    公开(公告)号:US5587883A

    公开(公告)日:1996-12-24

    申请号:US557667

    申请日:1995-11-13

    摘要: A lead frame package for housing an integrated circuit. A lead frame (11) having a plurality of leads (13) extending from at least three sides of the package. Lead frame (11) is formed having a first region (18), a transition region (19), and a second region (21). A distance between a heat sink (12) and the lead frame (11) may vary. The offset is chosen to compensate for a predetermined distance between the heat sink (12) and the lead frame (11) such that the lead frame (11) aligns to lead frame handling equipment. A single lead frame manufacturing setup can then be used. A slot (22) is formed in the lead frame (11) extending through the second region (21) and the transition region (19) into first area (18) providing a path for injecting an encapsulation material into a mold.

    摘要翻译: 用于容纳集成电路的引线框架封装。 一种引线框架(11),具有从封装的至少三个侧面延伸的多个引线(13)。 引线框架(11)形成有第一区域(18),过渡区域(19)和第二区域(21)。 散热器(12)和引线框架(11)之间的距离可以变化。 选择偏置以补偿散热器(12)和引线框架(11)之间的预定距离,使得引线框架(11)对准引线框处理设备。 然后可以使用单个引线框架制造设置。 在引线框架(11)中形成有延伸穿过第二区域(21)和过渡区域(19)进入第一区域(18)的槽(22),以提供将包封材料注入到模具中的路径。