公开(公告)号：US20240234287A9

公开(公告)日：2024-07-11

申请号：US18368760

申请日：2023-09-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geunwoo KIM ,  Sungeun JO

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/433 ,  H01L25/00 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/49838 ,  H01L23/4334 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/18 ,  H01L25/50 ,  H10B80/00 ,  H01L23/3128 ,  H01L2224/16227 ,  H01L2224/32221 ,  H01L2224/73253 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1443

Abstract: A semiconductor package includes: a first redistribution wiring layer having first redistribution wirings; a second redistribution wiring layer arranged on the first redistribution wiring layer, and including a first region, a second region, and a second redistribution wirings; a first semiconductor chip arranged on the first region of the second redistribution wiring layer; a plurality of second semiconductor chips spaced apart from each other on the upper surface of the second region of the second redistribution wiring layer; a plurality of third semiconductor chips arranged in the second region of the second redistribution wiring layer and spaced apart from each other between the first and second redistribution wiring layers; and a heat transfer medium arranged on the first region of the second redistribution wiring layer and overlapping the first semiconductor chip with the second redistribution wiring layer interposed between the first semiconductor chip and the heat transfer medium.

公开(公告)号：US20240234246A1

公开(公告)日：2024-07-11

申请号：US18616351

申请日：2024-03-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC: H01L23/433 ,  H01L23/13 ,  H01L23/24 ,  H01L23/473 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/433 ,  H01L23/13 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/49568 ,  H01L23/49861 ,  H01L25/0657 ,  H01L23/24 ,  H01L2224/33

Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

公开(公告)号：US12014974B2

公开(公告)日：2024-06-18

申请号：US17615206

申请日：2019-07-02

Applicant: Mitsubishi Electric Corporation

Inventor： Masakazu Tani

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/433 ,  H01L25/065 ,  H01L25/07

CPC classification number: H01L23/49575 ,  H01L21/565 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49568 ,  H01L24/40 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/072 ,  H01L2224/40139 ,  H01L2924/181

Abstract: A manufacturing method for a power module capable of shortening a manufacturing time for a power module is obtained. The manufacturing method for a power module includes: a subassembly arranging step of placing a subassembly including a first electrode, a semiconductor device, and a second electrode on a heat sink via a joining material; and a transfer molding step of, after the subassembly arranging step, under a state in which the first electrode, the semiconductor device, and a second-electrode inner portion are arranged in a region surrounded by the heat sink and a molding die, injecting a thermoplastic resin into the region, wherein, in the transfer molding step, the subassembly is joined to the heat sink via the joining material with use of the resin.

公开(公告)号：USRE49912E1

公开(公告)日：2024-04-09

申请号：US17360663

申请日：2021-06-28

Applicant: ROHM CO., LTD.

Inventor： Akihiro Kimura

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/373 ,  H01L27/02

CPC classification number: H01L23/49541 ,  H01L21/4853 ,  H01L21/4882 ,  H01L21/561 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/373 ,  H01L23/3731 ,  H01L23/4334 ,  H01L23/49503 ,  H01L23/49555 ,  H01L23/49568 ,  H01L24/73 ,  H01L27/0211 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/181

Abstract: A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections, a resin encapsulation portion having a recess portion for exposing at least a portion of the die pad sections, the resin encapsulation portion configured to cover the die pad sections and the semiconductor chips, and a heat radiation layer arranged in the recess portion. The heat radiation layer includes an elastic layer exposed toward a direction in which the recess portion is opened. The heat radiation layer directly faces at least a portion of the die pad sections. The elastic layer overlaps with at least a portion of the die pad sections when seen in a thickness direction of the heat radiation layer.

公开(公告)号：US11955347B2

公开(公告)日：2024-04-09

申请号：US17540322

申请日：2021-12-02

Applicant: ASMPT SINGAPORE PTE. LTD.

Inventor： Teng Hock Kuah ,  Yi Lin ,  Ravindra Raghavendra ,  Kar Weng Yan ,  Angelito Barrozo Perez

IPC: H01L21/56 ,  H01L23/433

CPC classification number: H01L21/565 ,  H01L23/4334

Abstract: One or more electronic devices that are mounted on a substrate, including at least one cooling plate in contact with the one or more electronic devices, are encapsulated. The substrate is clamped between a first mold half and a second mold half which define a molding cavity for molding the one or more electronic devices. A cavity insert movably located in the first mold half is projected into the cavity in order to contact and apply a sealing pressure onto the at least one cooling plate. After introducing a molding compound into the cavity at a first fill pressure, the molding compound in the cavity is packed by applying a second fill pressure which is higher than the first fill pressure. During this time, the sealing pressure is maintained at values that are higher than the first fill pressure and the second fill pressure.

公开(公告)号：US20240105663A1

公开(公告)日：2024-03-28

申请号：US18374770

申请日：2023-09-29

Applicant: Laird Technologies, Inc.

Inventor： Vijayaraghavan RAJAGOPAL ,  Eugene Anthony PRUSS ,  Richard F. HILL

IPC: H01L23/00 ,  F28F13/00 ,  H01L23/433

CPC classification number: H01L24/29 ,  F28F13/003 ,  H01L23/4334 ,  H01L24/27 ,  H01L24/83 ,  H01L23/3731 ,  H01L2224/29005 ,  H01L2224/29187 ,  H01L2224/29191 ,  H01L2224/29195 ,  H01L2224/29387 ,  H01L2224/29391 ,  H01L2924/3025

Abstract: Disclosed are exemplary embodiments of compressible foamed thermal interface materials. Also disclosed are methods of making and using compressible foamed thermal interface materials.

公开(公告)号：US11908771B2

公开(公告)日：2024-02-20

申请号：US17524879

申请日：2021-11-12

Applicant: Infineon Technologies AG

Inventor： Jayaganasan Narayanasamy ,  Angel Enverga ,  Chii Shang Hong ,  Chee Ming Lam ,  Sanjay Kumar Murugan ,  Subaramaniym Senivasan

IPC: H01L23/433 ,  H01L23/495 ,  H01L23/367 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/4334 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49811 ,  H01L24/84 ,  H01L23/49513 ,  H01L24/32 ,  H01L24/40 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/40175 ,  H01L2224/73263

Abstract: A molded semiconductor package includes: a semiconductor die; a substrate attached to a first side of the semiconductor die; a plurality of leads electrically connected to a pad at a second side of the semiconductor die opposite the first side; a heat sink clip thermally coupled to the pad; and a molding compound encapsulating the semiconductor die, part of the leads, part of the heat sink clip, and at least part of the substrate. The molding compound has a first main side, a second main side opposite the first main side and at which the substrate is disposed, and an edge extending between the first main side and the second main side. The leads protrude from opposing first and second faces of the edge of the molding compound. The heat sink clip protrudes from opposing third and fourth faces of the edge of the molding compound.

公开(公告)号：US20230245947A1

公开(公告)日：2023-08-03

申请号：US17711241

申请日：2022-04-01

Applicant: Taiwan Semiconductor Manufacturing Co.,Ltd.

Inventor： Jiun Yi Wu ,  Chen-Hua Yu

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/4334 ,  H01L25/0657 ,  H01L24/80 ,  H01L24/08 ,  H01L21/4871 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/08147

Abstract: A device package includes a first die directly bonded to a second die at an interface, wherein the interface comprises a metal-to-metal bond and a heat dissipation feature over the first die. The heat dissipation feature includes a thermal base over the first die and surrounding the second die, wherein the thermal base is made of a metal; and a plurality of thermal vias on the thermal base; and an encapsulant over first die and surrounding the second die, surrounding the thermal base, and surrounding the plurality of thermal vias.

公开(公告)号：US11659698B2

公开(公告)日：2023-05-23

申请号：US17031673

申请日：2020-09-24

Applicant: AUDI AG

Inventor： Daniel Ruppert

IPC: H05K7/20 ,  H05K7/14 ,  H01L23/31 ,  H01L23/36 ,  H02M1/32 ,  H01L23/433 ,  H01L23/473 ,  H02M7/00

CPC classification number: H05K7/20927 ,  H01L23/31 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/473 ,  H02M1/32 ,  H05K7/1432 ,  H05K7/209 ,  H05K7/20945 ,  H01L23/3107 ,  H02M1/327 ,  H02M7/003 ,  H05K7/20254

Abstract: A power module for electric drives is provided which comprises at least one exciter circuit with at least one power semiconductor, wherein the power module is molded and the exciter circuit with the at least one power semiconductor is integrated in the molded power module. A traction inverter is also provided which comprises a water-cooled main cooler, wherein the main cooler comprises a bearing surface which is configured to receive power modules, wherein the traction inverter comprises at least one molded power module, and wherein the main cooler forms a cooling connection which is configured to receive the molded power module on the main cooler.

公开(公告)号：US20190206759A1

公开(公告)日：2019-07-04

申请号：US16295962

申请日：2019-03-07

Applicant: NXP USA, Inc.

Inventor： Lakshminarayan Viswanathan ,  Mahesh K. Shah ,  Lu Li ,  David Abdo ,  Geoffrey Tucker ,  Carl Emil D'Acosta ,  Jaynal A. Molla ,  Justin Eugene Poarch ,  Paul Hart

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/13 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L23/367 ,  H01L21/4853 ,  H01L21/4867 ,  H01L21/4882 ,  H01L23/047 ,  H01L23/13 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/4334 ,  H01L23/5286 ,  H01L24/29 ,  H01L24/73 ,  H01L24/83 ,  H01L2023/4043 ,  H01L2023/405 ,  H01L2023/4062 ,  H01L2224/29239 ,  H01L2224/29244 ,  H01L2224/29247 ,  H01L2224/73265 ,  H01L2224/8384

Abstract: Microelectronic systems and components having integrated heat dissipation posts are disclosed, as are methods for fabricating such microelectronic systems and components. In various embodiments, the microelectronic system includes a substrate having a frontside, a socket cavity, and inner cavity sidewalls defining the socket cavity. A microelectronic component is seated on the frontside of the substrate such that a heat dissipation post, which projects from the microelectronic component, is received in the socket cavity and separated from the inner cavity sidewalls by a peripheral clearance. The microelectronic system further includes a bond layer contacting the inner cavity sidewalls, contacting an outer peripheral portion of the heat dissipation post, and at least partially filling the peripheral clearance.