COGNITIVE SIGNAL CONVERTER
    1.
    发明申请
    COGNITIVE SIGNAL CONVERTER 有权
    认知信号转换器

    公开(公告)号:US20160322984A1

    公开(公告)日:2016-11-03

    申请号:US15107568

    申请日:2014-12-03

    Abstract: A cognitive signal converter connectable to an analog signal source via an analog signal input port and adapted to produce a digital output signal based on an analog input signal received via the analog signal input port is disclosed. The cognitive signal converter comprises an analog-to-digital converter and a cognitive network. The analog-to-digital converter is adapted to produce a digital converted signal based on the analog input signal, a sample clock signal and a process clock signal by sampling the analog input signal in accordance with the sample clock signal and quantizing each analog input signal sample, wherein the quantizing process is operated by the process clock signal. The cognitive network is adapted to receive the digital converted signal of the analog-to-digital converter, control at least one of the sample clock signal and the process clock signal based on the received digital converted signal and one or more characteristics of the analog signal source, and produce the digital output signal based on the received digital converted signal. Corresponding integrated circuit, electronic device and method are also disclosed.

    Abstract translation: 公开了一种通过模拟信号输入端口连接到模拟信号源并适于产生基于经由模拟信号输入端口接收的模拟输入信号的数字输出信号的认知信号转换器。 认知信号转换器包括模数转换器和认知网络。 模拟 - 数字转换器适于基于模拟输入信号,采样时钟信号和处理时钟信号,通过根据采样时钟信号对模拟输入信号进行采样并量化每个模拟输入信号来产生数字转换信号 采样,其中量化处理由处理时钟信号操作。 认知网络适于接收模拟 - 数字转换器的数字转换信号,基于接收的数字转换信号和模拟信号的一个或多个特性来控制采样时钟信号和处理时钟信号中的至少一个 源,并且基于接收到的数字转换信号产生数字输出信号。 还公开了相应的集成电路,电子设备和方法。

    EFFICIENT TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER
    2.
    发明申请
    EFFICIENT TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER 有权
    高效的时间模拟数字转换器

    公开(公告)号:US20150381195A1

    公开(公告)日:2015-12-31

    申请号:US14769945

    申请日:2014-03-07

    CPC classification number: H03M1/1255 H03M1/121 H03M1/1215 H03M1/126

    Abstract: A time-interleaved analog-to-digital converter for conversion of an analog input signal to a digital output signal having a sample rate R comprises an array of N constituent analog-to-digital converters that operate based on an analog-to-digital converter operation clock to provide the digital output signal, N sample-and-hold units connected to the input of a respective constituent analog-to-digital converter that operate based on a respective one of M of timing signals, wherein no timing signal is used to clock two or more of the sample-and-hold units, one or more digital output processing units that provide a sample of the digital output of a constituent analog-to-digital converter as a sample of the digital output signal based on the respective one of the M timing signals, and a timing circuit that generates the analog-to-digital converter operation clock signal, each timing signal having a period of M/R, wherein M is less or equal to N.

    Abstract translation: 用于将模拟输入信号转换为具有采样率R的数字输出信号的时间交织的模拟 - 数字转换器包括基于模数转换器操作的N个组成模数转换器的阵列 操作时钟以提供数字输出信号,N个采样保持单元连接到基于M个定时信号中的相应一个的相应组成模数转换器的输入,其中不使用定时信号 时钟两个或更多个采样和保持单元,一个或多个数字输出处理单元,其基于相应的一个提供组成模数转换器的数字输出的采样作为数字输出信号的采样 的M个定时信号,以及定时电路,其生成模数转换器操作时钟信号,每个定时信号具有M / R周期,其中M小于或等于N.

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