公开(公告)号：US11941742B2

公开(公告)日：2024-03-26

申请号：US17808392

申请日：2022-06-23

Applicant: Apple Inc.

Inventor： Adam J. Smith ,  Sergio V. Tota ,  Christopher G. Martin ,  Yoong Chert Foo ,  Terence M. Potter ,  Max J. Batley

IPC: G06T15/00 ,  G06F9/38

CPC classification number: G06T15/005 ,  G06F9/3887

Abstract: Techniques are disclosed relating to processor communications fabrics. In some embodiments, a processor includes multiple client circuitry and fabric circuitry that includes at least first and second instances of a tile. The tile may include: client inputs configured to interface with client circuits, tile inputs configured to interface with one or more other tile instances, and communication resources assignable to the client inputs and tile inputs. The communications resources may include: multiple internal links, client outputs configured to interface with client circuits, and tile outputs configured to interface with one or more other tile instances. Control circuitry may, in a given cycle, assign communication resources of a given tile instance to at least a portion of the client inputs and tile inputs for a next cycle, based on priority information. The control circuitry may update priority information based on assignment results over multiple cycles.

公开(公告)号：US20250124643A1

公开(公告)日：2025-04-17

申请号：US18989970

申请日：2024-12-20

Applicant: Apple Inc.

Inventor： Adam J. Smith ,  Sergio V. Tota ,  Christopher G. Martin ,  Yoong Chert Foo ,  Terence M. Potter ,  Max J. Batley

IPC: G06T15/00 ,  G06F9/38

Abstract: Techniques are disclosed relating to processor communications fabrics. In some embodiments, a processor includes multiple client circuitry and fabric circuitry that includes at least first and second instances of a tile. The tile may include: client inputs configured to interface with client circuits, tile inputs configured to interface with one or more other tile instances, and communication resources that include internal links and outputs. The communication resources may be assignable to the client inputs and output and may include resources to satisfy all requests, in a given cycle, from one or more non-stallable channels supported by the apparatus. The communication resources may also include additional resources allocable, in a given cycle, to one or more stallable channels supported by the apparatus. Control circuitry may, in a given cycle, assign communication resources of a given tile instance to at least a portion of the client inputs and tile inputs for a next cycle, based on priority information. The control circuitry may update priority information based on assignment results.

公开(公告)号：US20230419585A1

公开(公告)日：2023-12-28

申请号：US17808392

申请日：2022-06-23

Applicant: Apple Inc.

Inventor： Adam J. Smith ,  Sergio V. Tota ,  Christopher G. Martin ,  Yoong Chert Foo ,  Terence M. Potter ,  Max J. Batley

IPC: G06T15/00 ,  G06F9/38

CPC classification number: G06T15/005 ,  G06F9/3887

Abstract: Techniques are disclosed relating to processor communications fabrics. In some embodiments, a processor includes multiple client circuitry and fabric circuitry that includes at least first and second instances of a tile. The tile may include: client inputs configured to interface with client circuits, tile inputs configured to interface with one or more other tile instances, and communication resources assignable to the client inputs and tile inputs. The communications resources may include: multiple internal links, client outputs configured to interface with client circuits, and tile outputs configured to interface with one or more other tile instances. Control circuitry may, in a given cycle, assign communication resources of a given tile instance to at least a portion of the client inputs and tile inputs for a next cycle, based on priority information. The control circuitry may update priority information based on assignment results over multiple cycles.