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公开(公告)号：US20230070458A1
公开(公告)日：2023-03-09
申请号：US17987485
申请日：2022-11-15
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade , Chong Zhang , Haiwei Lu , Chen Li
Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
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公开(公告)号：US11156773B2
公开(公告)日：2021-10-26
申请号：US17019158
申请日：2020-09-11
Applicant: Ayar Labs, Inc.
Inventor： Haiwei Lu , Chen Li , John Fini , Chong Zhang , Roy Edward Meade
Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.
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公开(公告)号：US20230418005A1
公开(公告)日：2023-12-28
申请号：US18463287
申请日：2023-09-07
Applicant: Ayar Labs, Inc.
Inventor： Manan Raval , Matthew Sysak , Chen Li , Chong Zhang
IPC: G02B6/42
CPC classification number: G02B6/423 , G02B6/4228 , G02B6/3873
Abstract: A first chip includes a first plurality of optical waveguides exposed at a facet of the first chip. A second chip includes a second plurality of optical waveguides exposed at a facet of the second chip. The second chip includes first and second spacers on opposite sides of the second plurality of optical waveguides. The first and second spacers have respective alignment surfaces oriented substantially parallel to the facet of the second chip at a controlled perpendicular distance away from the facet of the second chip. The second chip is positioned with the alignment surfaces of the first and second spacers contacting the facet of the first chip, and with the second plurality of optical waveguides respectively aligned with the first plurality of optical waveguides. The first and second spacers define and maintain an air gap of at least micrometer-level precision between the first and second pluralities of optical waveguides.
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公开(公告)号：US11762154B2
公开(公告)日：2023-09-19
申请号：US17385622
申请日：2021-07-26
Applicant: Ayar Labs, Inc.
Inventor： Manan Raval , Matthew Sysak , Chen Li , Chong Zhang
CPC classification number: G02B6/423 , G02B6/4228 , G02B6/3873 , G02B6/4234
Abstract: A first chip includes a first plurality of optical waveguides exposed at a facet of the first chip. A second chip includes a second plurality of optical waveguides exposed at a facet of the second chip. The second chip includes first and second spacers on opposite sides of the second plurality of optical waveguides. The first and second spacers have respective alignment surfaces oriented substantially parallel to the facet of the second chip at a controlled perpendicular distance away from the facet of the second chip. The second chip is positioned with the alignment surfaces of the first and second spacers contacting the facet of the first chip, and with the second plurality of optical waveguides respectively aligned with the first plurality of optical waveguides. The first and second spacers define and maintain an air gap of at least micrometer-level precision between the first and second pluralities of optical waveguides.
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公开(公告)号：US11500153B2
公开(公告)日：2022-11-15
申请号：US17070601
申请日：2020-10-14
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade , Chong Zhang , Haiwei Lu , Chen Li
Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
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Patent Agency Ranking
公开(公告)号：US20230275671A1
公开(公告)日：2023-08-31
申请号：US18174860
申请日：2023-02-27
Applicant: Ayar Labs, Inc.
Inventor： Manan Raval , Matthew Sysak , Chen Li
IPC: H04B10/50 , H04B10/2519 , H04B10/294
CPC classification number: H04B10/504 , H04B10/2519 , H04B10/294
Abstract: An electro-optical chip includes a plurality of transmit macros, each of which includes an optical waveguide and a plurality of ring resonators positioned along the optical waveguide. An optical distribution network is implemented onboard the electro-optical chip and includes a plurality of optical inputs and a plurality of optical outputs. The optical distribution network conveys a portion of light received at a subset of the plurality of optical inputs to one or more of the plurality of optical outputs, such that light conveyed to said one or more of the plurality of optical outputs includes wavelengths of light conveyed to said subset of the plurality of optical inputs. The subset of the plurality of optical inputs includes at least two of the plurality of optical inputs. Each of the plurality of optical outputs is optically connected to the optical waveguide in a corresponding one of the plurality of transmit macros.
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公开(公告)号：US20220035107A1
公开(公告)日：2022-02-03
申请号：US17385622
申请日：2021-07-26
Applicant: Ayar Labs, Inc.
Inventor： Manan Raval , Matthew Sysak , Chen Li , Chong Zhang
IPC: G02B6/38
Abstract: A first chip includes a first plurality of optical waveguides exposed at a facet of the first chip. A second chip includes a second plurality of optical waveguides exposed at a facet of the second chip. The second chip includes first and second spacers on opposite sides of the second plurality of optical waveguides. The first and second spacers have respective alignment surfaces oriented substantially parallel to the facet of the second chip at a controlled perpendicular distance away from the facet of the second chip. The second chip is positioned with the alignment surfaces of the first and second spacers contacting the facet of the first chip, and with the second plurality of optical waveguides respectively aligned with the first plurality of optical waveguides. The first and second spacers define and maintain an air gap of at least micrometer-level precision between the first and second pluralities of optical waveguides.
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公开(公告)号：US20210080647A1
公开(公告)日：2021-03-18
申请号：US17019158
申请日：2020-09-11
Applicant: Ayar Labs, Inc.
Inventor： Haiwei Lu , Chen Li , John Fini , Chong Zhang , Roy Edward Meade
Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.
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公开(公告)号：US12019269B2
公开(公告)日：2024-06-25
申请号：US17987485
申请日：2022-11-15
Applicant: Ayar Labs, Inc.
Inventor： Roy Edward Meade , Chong Zhang , Haiwei Lu , Chen Li
CPC classification number: G02B6/1225 , G02B6/12011 , G02B2006/1213
Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.
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公开(公告)号：US20230273371A1
公开(公告)日：2023-08-31
申请号：US18174844
申请日：2023-02-27
Applicant: Ayar Labs, Inc.
Inventor： Manan Raval , Matthew Sysak , Chen Li
CPC classification number: G02B6/124 , G02B6/12004 , G02B6/1225
Abstract: An electro-optical chip includes a plurality of transmit macros, each of which includes an optical waveguide and a plurality of ring resonators positioned along the optical waveguide. An optical distribution network is implemented onboard the electro-optical chip. The optical distribution network has a plurality of optical inputs and a plurality of optical outputs. The optical distribution network conveys a portion of light received at each and every one of the plurality of optical inputs to each of the plurality of optical outputs, such that light conveyed to each of the plurality of optical outputs includes all wavelengths of light conveyed to the plurality of optical inputs. Each of the plurality of optical outputs is optically connected to the optical waveguide in a corresponding one of the plurality of transmit macros. The electro-optical chip is optically connected to a remote optical power supply.
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