Sample and Hold Circuit with Reduced Noise
    1.
    发明申请
    Sample and Hold Circuit with Reduced Noise 有权
    采样和保持电路噪声降低

    公开(公告)号:US20140300389A1

    公开(公告)日:2014-10-09

    申请号:US13856402

    申请日:2013-04-03

    CPC classification number: H03K5/1252 G11C27/026

    Abstract: A sample and hold circuit and a method for sampling a signal are disclosed. The sample and hold circuit includes first and second switches, first, second, and third capacitors, and an amplifier. The amplifier receives a signal to be sampled on a first input. The first capacitor is characterized by a first capacitance and has a first terminal connected to an output of the amplifier by the first switch. The second capacitor is characterized by a second capacitance and has a second terminal connected to the output of the amplifier by the second switch. The third capacitor connects the first and second terminals. The amplifier is configured to form a capacitive transimpedance amplifier having the third capacitor as a feedback circuit when the first switch is in a non-conducting state and the second switch is in a conducting state.

    Abstract translation: 公开了采样保持电路和采样信号的方法。 采样和保持电路包括第一和第二开关,第一,第二和第三电容器以及放大器。 放大器接收要在第一输入上采样的信号。 第一电容器的特征在于第一电容,并且具有通过第一开关连接到放大器的输出端的第一端子。 第二电容器的特征在于第二电容,并且具有通过第二开关连接到放大器的输出端的第二端子。 第三电容器连接第一和第二端子。 当第一开关处于非导通状态并且第二开关处于导通状态时,放大器被配置为形成具有作为反馈电路的第三电容器的电容跨阻放大器。

    Variable Gain Column Amplifier Adapted for Use in Imaging Arrays
    2.
    发明申请
    Variable Gain Column Amplifier Adapted for Use in Imaging Arrays 有权
    适用于成像阵列的可变增益列放大器

    公开(公告)号:US20150156413A1

    公开(公告)日:2015-06-04

    申请号:US14097162

    申请日:2013-12-04

    Abstract: An imaging sensor using a novel bit line processing circuit, that circuit, and the method of processing the pixel outputs from an image sensor using that processing circuit are disclosed. The image sensor includes an array of pixel sensors, a signal digitizing circuit, and a digitizing controller. Each pixel sensor generates a voltage signal that is a function of a charge on the photodetector in that pixel sensor, and couples that voltage signal to a bit line in response to a first signal. The signal digitizing circuit is connected to the bit line, the digitizing circuit converting the voltage signal to a plurality of output digital values, the output digital values having selectable levels of digitization noise. The digitizing controller generates the level of noise based on the voltage signal. The signal digitizing circuit includes a variable gain amplifier and an ADC having a fixed number of bits.

    Abstract translation: 公开了一种利用新颖的位线处理电路,该电路以及使用该处理电路从图像传感器处理像素输出的方法的成像传感器。 图像传感器包括像素传感器阵列,信号数字化电路和数字化控制器。 每个像素传感器产生作为该像素传感器中的光电检测器上的电荷的函数的电压信号,并且响应于第一信号将该电压信号耦合到位线。 信号数字化电路连接到位线,数字化电路将电压信号转换为多个输出数字值,输出数字值具有可选择的数字化噪声水平。 数字化控制器基于电压信号产生噪声电平。 信号数字化电路包括可变增益放大器和具有固定位数的ADC。

    Power distribution network adapted for imaging arrays

    公开(公告)号:US10469781B1

    公开(公告)日:2019-11-05

    申请号:US16212325

    申请日:2018-12-06

    Abstract: A power distribution network is disclosed. The power distribution can be applied to imaging arrays and other circuits that include a large number of conductors that must be driven such that the conductors are biased such that substantially the same current flows in each conductor. The power distribution network includes a plurality of bit lines and a first power connection network. Each bit line is connected to a different location on a first power bus, which is divided into a plurality of first conducting segments. Each first conducting segment is connected to a plurality of the bit lines. Each bit line includes a constant current source that causes a bias current to flow in the bit line and through the first power bus. The first power connection network includes a plurality of conducting paths that connect a corresponding one of the first conducting segments to a first power rail.

    Variable gain column amplifier adapted for use in imaging arrays
    4.
    发明授权
    Variable gain column amplifier adapted for use in imaging arrays 有权
    适用于成像阵列的可变增益列放大器

    公开(公告)号:US09253396B2

    公开(公告)日:2016-02-02

    申请号:US14097162

    申请日:2013-12-04

    Abstract: An imaging sensor using a novel bit line processing circuit, that circuit, and the method of processing the pixel outputs from an image sensor using that processing circuit are disclosed. The image sensor includes an array of pixel sensors, a signal digitizing circuit, and a digitizing controller. Each pixel sensor generates a voltage signal that is a function of a charge on the photodetector in that pixel sensor, and couples that voltage signal to a bit line in response to a first signal. The signal digitizing circuit is connected to the bit line, the digitizing circuit converting the voltage signal to a plurality of output digital values, the output digital values having selectable levels of digitization noise. The digitizing controller generates the level of noise based on the voltage signal. The signal digitizing circuit includes a variable gain amplifier and an ADC having a fixed number of bits.

    Abstract translation: 公开了一种利用新颖的位线处理电路,该电路以及使用该处理电路从图像传感器处理像素输出的方法的成像传感器。 图像传感器包括像素传感器阵列,信号数字化电路和数字化控制器。 每个像素传感器产生作为该像素传感器中的光电检测器上的电荷的函数的电压信号,并且响应于第一信号将该电压信号耦合到位线。 信号数字化电路连接到位线,数字化电路将电压信号转换为多个输出数字值,输出数字值具有可选择的数字化噪声水平。 数字化控制器基于电压信号产生噪声电平。 信号数字化电路包括可变增益放大器和具有固定位数的ADC。

    Sample and hold circuit with reduced noise
    5.
    发明授权
    Sample and hold circuit with reduced noise 有权
    采样保持电路噪声降低

    公开(公告)号:US08952729B2

    公开(公告)日:2015-02-10

    申请号:US13856402

    申请日:2013-04-03

    CPC classification number: H03K5/1252 G11C27/026

    Abstract: A sample and hold circuit and a method for sampling a signal are disclosed. The sample and hold circuit includes first and second switches, first, second, and third capacitors, and an amplifier. The amplifier receives a signal to be sampled on a first input. The first capacitor is characterized by a first capacitance and has a first terminal connected to an output of the amplifier by the first switch. The second capacitor is characterized by a second capacitance and has a second terminal connected to the output of the amplifier by the second switch. The third capacitor connects the first and second terminals. The amplifier is configured to form a capacitive transimpedance amplifier having the third capacitor as a feedback circuit when the first switch is in a non-conducting state and the second switch is in a conducting state.

    Abstract translation: 公开了采样保持电路和采样信号的方法。 采样和保持电路包括第一和第二开关,第一,第二和第三电容器以及放大器。 放大器接收要在第一输入上采样的信号。 第一电容器的特征在于第一电容,并且具有通过第一开关连接到放大器的输出端的第一端子。 第二电容器的特征在于第二电容,并且具有通过第二开关连接到放大器的输出端的第二端子。 第三电容器连接第一和第二端子。 当第一开关处于非导通状态并且第二开关处于导通状态时,放大器被配置为形成具有作为反馈电路的第三电容器的电容跨阻放大器。

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