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公开(公告)号：US20190251928A1
公开(公告)日：2019-08-15
申请号：US16056912
申请日：2018-08-07
发明人： Ruifang Du , Tong Yang , Xiaoye Ma
IPC分类号： G09G5/00
摘要： Embodiments of the disclosure provide a gate driver, a display apparatus and a method for controlling the gate driver. The gate driver comprises a plurality of clock signal terminals; a controlling signal terminal; and N stages of cascaded gate driving circuits. Each of the N stages of cascaded gate driving circuits is configured to pull-up a voltage of an outputting terminal of the gate driving circuit according to a signal at the respective clock signal terminal, and to perform a noise reduction operation according to a signal at the controlling signal terminal. A controller is coupled with the clock signal terminals and the controlling signal terminal, and is configured to detect signals at the plurality of clock signal terminals, and to output a valid level signal to the controlling signal terminal in response to the signal at the clock signal terminal being abnormal.
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公开(公告)号：US11630359B2
公开(公告)日：2023-04-18
申请号：US16473761
申请日：2018-12-27
发明人： Ruifang Du , Fengzhen Lyu , Hui Li , Xiaoye Ma
IPC分类号： G02F1/1368 , G02F1/1362 , G02F1/1343
摘要： The present disclosure provides a display substrate and a display device. The display substrate includes a common electrode. The common electrode includes an electrode unit array. The electrode unit array includes a plurality of electrode units. Each of the electrode units corresponds to two adjacent sub-pixels. Each of the electrode units includes a boundary electrode line and an inner region defined by the boundary electrode line. The inner region includes a first region and a second region. The first region includes a plurality of first strip electrode lines having a same longitudinal direction. Two adjacent first strip electrode lines are not connected inside the first region. The second region includes a plurality of second strip electrode lines having a same longitudinal direction. Two adjacent second strip electrode lines are not connected inside the second region.
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公开(公告)号：US11410586B2
公开(公告)日：2022-08-09
申请号：US16487828
申请日：2019-03-19
发明人： Donghui Zhang , Xiaoye Ma , Guodong Liu , Xiaofang Gu , Ruifang Du , Huan Ni , Zhenyu Han
IPC分类号： G09G5/02 , G09G3/20 , H04N13/356 , G02F1/1343 , G02F1/1335 , G09G3/00 , H04N13/302 , H04N13/31 , G02B30/30
摘要： A display device and driving method thereof and a manufacturing method of a display substrate involve an array substrate and manufacturing method thereof. The array substrate includes: a base substrate; and a number of display sub-pixels arranged in a matrix on the base substrate. Each individual display sub-pixel includes: a pixel electrode; a first common electrode; and a second common electrode; wherein the first common electrode and the second common electrode are insulated from each other; and wherein the pixel electrode is configured to interact respectively with the first common electrode and the second common electrode so as to conduct one or more display operations.
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公开(公告)号：US10948760B2
公开(公告)日：2021-03-16
申请号：US16497134
申请日：2018-11-14
发明人： Zijun Cao , Ruifang Du
IPC分类号： G02F1/1335 , G02F1/13357 , G02F1/1333
摘要： A liquid crystal display panel includes a light adjusting layer. The light adjusting layer is configured to reduce a yellowing degree of a peripheral display area. The light adjusting layer is located in the peripheral display area in a display area of the liquid crystal display panel, and the peripheral display area is located at a periphery of an intermediate display area in the display area.
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公开(公告)号：US20210018802A1
公开(公告)日：2021-01-21
申请号：US16338300
申请日：2018-10-08
发明人： Ruifang Du , Zijun Cao , Xiaoye Ma
IPC分类号： G02F1/1362 , H05F3/02
摘要： A display panel includes a first anti-static wiring and a second anti-static wiring which are disposed at the periphery of a display area. The second anti-static wiring is electrically connected to the first anti-static wiring via a first anti-static unit. The second anti-static wiring is disposed at the periphery of the first anti-static wiring, and the first anti-static wiring and the second anti-static wiring are both electrically connected to a circuit board of the display device.
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6.发明授权公开(公告)号：US10559372B2
公开(公告)日：2020-02-11
申请号：US16511665
申请日：2019-07-15
发明人： Ruifang Du , Xiaoye Ma
IPC分类号： G11C19/28 , G09G3/36 , G09G3/3266
摘要： A shift register circuit includes a first output sub-circuit, and a second output sub-circuit. The first output sub-circuit is coupled to a clock signal terminal, a control signal terminal, a pull-up node and an output signal terminal, and is configured to output a clock signal output via the clock signal terminal to the output signal terminal under control of the control signal output via a control signal terminal and the potential of the pull-up node. The second output sub-circuit is coupled to the clock signal terminal, the pull-up node and the output signal terminal, and is configured to output the clock signal to the output signal terminal under control of the potential of the pull-up node.
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公开(公告)号：US11922846B2
公开(公告)日：2024-03-05
申请号：US17755900
申请日：2021-02-03
发明人： Rui Ma , Xiaoye Ma , Xianjie Shao , Ruifang Du
CPC分类号： G09G3/20 , G11C19/28 , G09G2310/0286
摘要： Disclosed are a gate driving circuit and a display device. According to the gate driving circuit, in every five adjacent shift registers, the output control end of the first shift register is electrically connected to the input signal end of the fifth shift register; in every six adjacent shift registers, the output control end of the sixth shift register is electrically connected to the reset signal end of the first shift register. In the gate driving circuit of a cascade structure provided by the present disclosure, there are fewer cascade signal lines, thereby saving space, further implementing the narrow bezel of a display device; in addition, for the gate driving circuit of a cascade structure provided by the present disclosure, the signal provided by an external circuit board can be more flexible, even if a display product is manufactured, the pulse width of a clock signal can be adjusted by means of the external circuit board, thereby adjusting the high-level width of a gate signal output by a gate signal output end, and the flexibility is high.
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公开(公告)号：US20210201749A1
公开(公告)日：2021-07-01
申请号：US16072822
申请日：2017-11-29
发明人： Ruifang Du , Xibin Shao , Rui Ma , Xiaoye Ma
摘要： The present disclosure relates to a display substrate, a method for driving the same, and a display panel. The display substrate includes a base substrate as well as gate lines, data lines and a gate driver on the base substrate, the gate line being connected to the gate driver, and electrostatic rings and control components corresponding to at least one gate line are further disposed on the base substrate, each of the gate lines being connected to the electrostatic ring by a corresponding control component. The electrostatic ring is configured to load a control voltage to turn on the corresponding control component after the display panel is turned off, and the corresponding control component is configured to be turned on to change a voltage on the gate line into a turn-on voltage after the display panel is turned off.
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公开(公告)号：US20200090613A1
公开(公告)日：2020-03-19
申请号：US16335814
申请日：2018-07-19
发明人： Ruifang Du , Jiyan Ma , Xiaoye Ma , Rui Ma
摘要： There is provided in the present disclosure a shift register unit, including: an input sub-circuit, whose first terminal is coupled to an input signal terminal, and second terminal is coupled to a pull-up node; an output sub-circuit, whose first terminal is coupled to the pull-up node, second terminal is coupled to a clock signal terminal, and third terminal is coupled to an output terminal, and configured to output a clock signal of the clock signal terminal to the output terminal under the control of a level signal of the pull-up node; a first electro-static discharge sub-circuit, whose first terminal is coupled to the pull-up node, second terminal is coupled to an electro-static discharge control terminal, and third terminal is coupled to a ground, and configured to discharge static electricity accumulated at the pull-up node under the control of a level signal of the electro-static discharge control terminal.
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公开(公告)号：US10559278B2
公开(公告)日：2020-02-11
申请号：US16056912
申请日：2018-08-07
发明人： Ruifang Du , Tong Yang , Xiaoye Ma
摘要： Embodiments of the disclosure provide a gate driver, a display apparatus and a method for controlling the gate driver. The gate driver comprises a plurality of clock signal terminals; a controlling signal terminal; and N stages of cascaded gate driving circuits. Each of the N stages of cascaded gate driving circuits is configured to pull-up a voltage of an outputting terminal of the gate driving circuit according to a signal at the respective clock signal terminal, and to perform a noise reduction operation according to a signal at the controlling signal terminal. A controller is coupled with the clock signal terminals and the controlling signal terminal, and is configured to detect signals at the plurality of clock signal terminals, and to output a valid level signal to the controlling signal terminal in response to the signal at the clock signal terminal being abnormal.
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