公开(公告)号：US20240290275A1

公开(公告)日：2024-08-29

申请号：US18245534

申请日：2022-05-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan Lu ,  Zhenzhen Shan ,  Jianchao Zhu ,  Guangliang Shang ,  Xing Yao

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2310/08

Abstract: A scan circuit having a plurality of stages is provided. A respective stage includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit configured to receive a start signal or an output signal from a previous scan unit, a first processing subcircuit, a second processing subcircuit, and an output subcircuit. The output subcircuit includes a first output transistor. The input subcircuit includes a first input transistor and a second input transistor sequentially coupled between an input terminal and a first node. The first node is coupled to a gate electrode of the first output transistor. The first processing subcircuit includes a first switch transistor and a second switch transistor coupled between the first node and a first reference terminal. The first reference terminal is configured to receive a first reference signal.

公开(公告)号：US12277907B2

公开(公告)日：2025-04-15

申请号：US18274958

申请日：2022-07-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiangnan Lu ,  Libin Liu ,  Zhenzhen Shan ,  Shiming Shi

IPC: G09G3/32 ,  G09G3/3225 ,  G09G3/3258 ,  H10K59/121

Abstract: Provided are a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit, a storage sub-circuit, a first reset sub-circuit, a second reset sub-circuit. The driving sub-circuit and the storage sub-circuit are connected at a first node; the data writing sub-circuit and the storage sub-circuit are connected at a second node; the first reset sub-circuit includes a first transistor having a control electrode connected with a first reset signal line, a first electrode connected with a first initialization signal line, and a second electrode connected with the first node; the threshold compensation sub-circuit includes a second transistor having a first electrode connected with the first node, a second electrode connected with the second node, and a control electrode connected with a second scan line; the first transistor and/or the second transistor includes an oxide thin film transistor.

公开(公告)号：US20240112636A1

公开(公告)日：2024-04-04

申请号：US18262598

申请日：2022-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhenzhen Shan ,  Libin Liu ,  Jiangnan Lu ,  Shiming Shi

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G2300/0852 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2330/021

Abstract: A display substrate includes a pixel driving circuit, which includes a driving circuit, a storage circuit and a reset circuit. The reset circuit is electrically connected to a first terminal of the driving circuit. The driving circuit is used to conduct a path between the first terminal and a second terminal of the driving circuit under the control of a potential at its control terminal. The storage circuit is electrically connected to the control terminal of the driving circuit. The reset circuit includes a first capacitor. The storage circuit includes a second capacitor. An area of an overlap between orthographic projections of a first electrode plate and a second electrode plate of the first capacitor on the base substrate is smaller than that of the second capacitor on the base substrate.

公开(公告)号：US20250148995A1

公开(公告)日：2025-05-08

申请号：US19013194

申请日：2025-01-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan Lu ,  Zhenzhen Shan ,  Jianchao Zhu ,  Guangliang Shang ,  Xing Yao

IPC: G09G3/3266

Abstract: A display substrate includes a scan circuit, a first reference signal line in a third region, and at least three clock signal lines arranged in a fourth region. The scan circuit includes a plurality of stages, wherein a respective stage of the scan circuit includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit configured to receive from an input terminal a start signal or an output signal from a previous scan unit of a previous stage, a first processing subcircuit, a second processing subcircuit, and an output subcircuit configured to output an output signal from an output terminal. The output subcircuit includes a first output transistor. The input subcircuit includes a first input transistor and a second input transistor sequentially coupled between an input terminal and a first node.

公开(公告)号：US12230216B2

公开(公告)日：2025-02-18

申请号：US18245534

申请日：2022-05-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan Lu ,  Zhenzhen Shan ,  Jianchao Zhu ,  Guangliang Shang ,  Xing Yao

IPC: G09G3/32 ,  G09G3/3266

Abstract: A scan circuit having a plurality of stages is provided. A respective stage includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit configured to receive a start signal or an output signal from a previous scan unit, a first processing subcircuit, a second processing subcircuit, and an output subcircuit. The output subcircuit includes a first output transistor. The input subcircuit includes a first input transistor and a second input transistor sequentially coupled between an input terminal and a first node. The first node is coupled to a gate electrode of the first output transistor. The first processing subcircuit includes a first switch transistor and a second switch transistor coupled between the first node and a first reference terminal. The first reference terminal is configured to receive a first reference signal.

公开(公告)号：US12223908B2

公开(公告)日：2025-02-11

申请号：US18262598

申请日：2022-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhenzhen Shan ,  Libin Liu ,  Jiangnan Lu ,  Shiming Shi

IPC: G09G3/3258 ,  G09G3/32 ,  G09G3/3233 ,  G09G3/3266 ,  G11C19/28 ,  H01L27/12 ,  H01L21/77

Abstract: A display substrate includes a pixel driving circuit, which includes a driving circuit, a storage circuit and a reset circuit. The reset circuit is electrically connected to a first terminal of the driving circuit. The driving circuit is used to conduct a path between the first terminal and a second terminal of the driving circuit under the control of a potential at its control terminal. The storage circuit is electrically connected to the control terminal of the driving circuit. The reset circuit includes a first capacitor. The storage circuit includes a second capacitor. An area of an overlap between orthographic projections of a first electrode plate and a second electrode plate of the first capacitor on the base substrate is smaller than that of the second capacitor on the base substrate.