公开(公告)号：US12223908B2

公开(公告)日：2025-02-11

申请号：US18262598

申请日：2022-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhenzhen Shan ,  Libin Liu ,  Jiangnan Lu ,  Shiming Shi

IPC: G09G3/3258 ,  G09G3/32 ,  G09G3/3233 ,  G09G3/3266 ,  G11C19/28 ,  H01L27/12 ,  H01L21/77

Abstract: A display substrate includes a pixel driving circuit, which includes a driving circuit, a storage circuit and a reset circuit. The reset circuit is electrically connected to a first terminal of the driving circuit. The driving circuit is used to conduct a path between the first terminal and a second terminal of the driving circuit under the control of a potential at its control terminal. The storage circuit is electrically connected to the control terminal of the driving circuit. The reset circuit includes a first capacitor. The storage circuit includes a second capacitor. An area of an overlap between orthographic projections of a first electrode plate and a second electrode plate of the first capacitor on the base substrate is smaller than that of the second capacitor on the base substrate.

公开(公告)号：US12222761B2

公开(公告)日：2025-02-11

申请号：US17920740

申请日：2021-06-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Linlin Xu ,  Shangchieh Chu ,  Shiming Shi

IPC: G06F1/16 ,  H04M1/02 ,  H04B1/3888

Abstract: Disclosed are a display module and a display device. The display module includes a rear shell and an intermediate frame, and a display screen, an ultra-thin protective cover plate, and a protective film. The rear shell has a back plate and a first folded edge bent and extending from the edge of the back plate to the side of the display screen. The intermediate frame is located in a region enclosed by the back plate and the first folded edge. The ultra-thin protective cover plate has a first surface away from the side of the display screen, and a side surface located on the edge. The protective film includes a first part attached to the first surface of the ultra-thin protective cover plate, and a second part coating the side surface of the ultra-thin protective cover plate.

公开(公告)号：US20250006133A1

公开(公告)日：2025-01-02

申请号：US18264043

申请日：2022-11-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yu Feng ,  Libin Liu ,  Shiming Shi

IPC: G09G3/3266 ,  G09G3/32

Abstract: A driving circuit is provided. The driving circuit includes one or more scan circuits; wherein the one or more scan circuits comprise a first scan circuit; wherein the first scan circuit comprises a plurality of first scan sub-circuits; and at least two first scan sub-circuits of the plurality of first scan sub-circuits are configured to drive two display sub-areas of a plurality of display sub-areas of a display area with two different driving frequencies in at least one frame of image, respectively.

公开(公告)号：US12096573B2

公开(公告)日：2024-09-17

申请号：US18211673

申请日：2023-06-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yonghong Zhou ,  Shiming Shi ,  Shangchieh Chu

IPC: H05K5/00

CPC classification number: H05K5/0017

Abstract: Provided is a flexible display device, including a flexible display panel and a support structure, the flexible display panel includes a main structure region, a bending region and an extension region, the bending region is bent to locate the extension region at a back of the main structure region, an accommodation space is formed between the main structure region, the extension region and the bending region, at least part of the support structure is located in the accommodation space, and one end of the support structure extends into a bending space surrounded by the bending region.

公开(公告)号：US12052901B2

公开(公告)日：2024-07-30

申请号：US17310325

申请日：2021-03-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Libin Liu ,  Mei Li ,  Shiming Shi ,  Li Wang

IPC: H10K59/35 ,  H10K50/80 ,  H10K59/122 ,  H10K59/131 ,  H10K71/00 ,  H10K59/12

CPC classification number: H10K59/353 ,  H10K50/80 ,  H10K59/122 ,  H10K59/131 ,  H10K59/352 ,  H10K71/00 ,  H10K59/1201

Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a display area and a non-display area located at a periphery of the display area, wherein the display area includes a plurality of pixel opening areas and a pixel spacing area located between the pixel opening areas; the display substrate further includes: a first electrode, wherein at least part of the first electrode is located in the pixel spacing area, an orthographic projection of the first electrode on a substrate of the display substrate does not overlap an orthographic projection of the pixel opening area on the substrate; and a second electrode electrically connected to the first electrode and located in the non-display area.

公开(公告)号：US20240233631A1

公开(公告)日：2024-07-11

申请号：US18246047

申请日：2022-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Baoyun Wu ,  Yang Yu ,  Yuanzhang Zhu ,  Xuesong Tian ,  Xinbin Han ,  Shiming Shi ,  Hui Zhao ,  Hualing Yang

IPC: G09G3/3225

CPC classification number: G09G3/3225 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0252 ,  G09G2340/0435 ,  G09G2370/00

Abstract: A display controller, a display device, a display system, and a control method are provided. The display controller includes: a flag-signal circuit configured to send a flag-signal to an application processor; an image processing circuit configured to obtain second current image data in response to receiving first current image data from the application processor, wherein the first current image data is sent by the application processor in response to receiving the flag-signal sent from the flag-signal circuit; and a drive circuit configured to generate a first drive control signal in response to receiving the second current image data from the image processing circuit.

公开(公告)号：US11987041B2

公开(公告)日：2024-05-21

申请号：US17299012

申请日：2020-08-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Liming Dong ,  Shiming Shi ,  Lu Liu ,  Lijuan Zhao ,  Zhao Li

IPC: B32B7/12 ,  B32B1/00 ,  H05K5/00 ,  H05K5/03

CPC classification number: B32B7/12 ,  B32B1/00 ,  H05K5/0017 ,  H05K5/03 ,  B32B2307/42 ,  B32B2307/546 ,  B32B2307/732 ,  B32B2457/20

Abstract: Embodiments of the present disclosure provide a display module, including: a flexible panel, a first group of film layers attached to a light-emitting side of the flexible panel, and a second group of film layers attached to a non-light-emitting side of the flexible panel away from the light-emitting side. The display module is capable of being folded to a curved plate, such that at least a portion of an orthographic projection of the display module on a first plane perpendicular to the curved plate has a shape of a water-drop profile comprising a neck portion and a body portion. At least a portion of orthographic projections, on the first plane, of two opposite ends of the display module forms the neck portion, and an orthographic projection, on the first plane, of a middle portion of the display module between the two opposite ends forms the body portion.

公开(公告)号：US11875748B2

公开(公告)日：2024-01-16

申请号：US17433668

申请日：2021-02-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang Shang ,  Tian Dong ,  Xinshe Yin ,  Mei Li ,  Libin Liu ,  Shiming Shi

IPC: G11C19/28 ,  G09G3/3266 ,  G09G3/3233 ,  G09G3/20

CPC classification number: G09G3/3266 ,  G11C19/28 ,  G09G3/20 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2320/0247 ,  G09G2330/021

Abstract: Provided are a gate driving circuit, a display substrate, a display device and a gate driving method, the gate driving circuit includes: a frequency doubling control circuit and an effective output circuit including first shift registers, the first shift register at the first stage has a first signal input terminal coupled with an output control signal line and a second signal input terminal coupled with the frequency doubling control circuit; the frequency doubling control circuit is coupled to the output control signal line, for providing a frequency doubling control signal thereto after a preset time period from the receipt of the output control signal in response to an output control signal from the output control signal line; the first shift register at the first stage outputs a scanning signal in response to the output control signal and a scanning signal in response to the frequency doubling control signal.

公开(公告)号：US11862098B2

公开(公告)日：2024-01-02

申请号：US17628779

申请日：2021-04-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang Shang ,  Jie Zhang ,  Shuo Huang ,  Libin Liu ,  Shiming Shi ,  Hao Liu ,  Haoliang Zheng ,  Xing Yao

IPC: G09G3/3266 ,  G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3266 ,  G09G3/3677 ,  G11C19/28 ,  G09G2300/0852 ,  G09G2310/0286

Abstract: A shift register, a driving method, a driving control circuit and a display device. The method comprises: at a data refresh stage (T10), applying to an input signal end (IP) an input signal having a pulse level, applying a control clock pulse signal to a control clock signal end, and applying a noise reduction clock pulse signal to a noise reduction clock signal end; at a noise reduction holding phase (T21-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a fixed voltage signal to the noise reduction clock signal end; and at a noise reduction enhancement stage (T22-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a clock pulse signal to the noise reduction clock signal end.

公开(公告)号：US11170682B2

公开(公告)日：2021-11-09

申请号：US16651816

申请日：2019-03-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang Shang ,  Libin Liu ,  Can Zheng ,  Yipeng Chen ,  Xinshe Yin ,  Shiming Shi

IPC: G09G3/20 ,  G11C19/28

Abstract: Provided are a shift register and a driving method thereof, a gate driving circuit, and a display device. The shift register includes: an input circuit, configured to be coupled to an input signal end and a second clock signal end, respectively; a first transistor, where the first electrode of the first transistor is coupled to the output end of the input circuit, and the first transistor is a double-gate type transistor; the first gate of the first transistor is configured to be coupled to a first reference signal end, and the second gate of the first transistor is configured to be coupled to a first threshold control signal end; and an output circuit, configured to be coupled to a first clock signal end and a signal output end, respectively, where the control end of the output circuit is coupled to the second electrode of the first transistor.